Intel’s Enterprise product announcements

[exetras]

1 hour ago, COTG said:

can i ask what industry/firm you work for? Personally I believe that AMD is far superior to intel in a variety of workloads now, but adoption is slow so I like to keep up with actual real life experiences.  

I can tell you that I work for a pharma Subcontractor as a Sysadmin.

 

We generally purchase about 10 PC\Laptop a year. It was Intel based for a long while since the Previous AMD offering were sub par. But now its an even playing field which is nice.

 

Here is a reddit post talking about the delays. https://old.reddit.com/r/sysadmin/comments/b8rtzd/red_vs_blue/

 

[Ithanul]

21 hours ago, Blademaster91 said:

That is a lot though 3.8Ghz is nice for it being a server cpu.

Yep, be interesting to see how these perform.  The Opitane is very interesting.  There probably some database servers that would love that in their setups. 

 

I'm curious is how that 56 core chip's latency, bandwidth, and performance handling is.  

[S w a t s o n]

Saw an interesting picture, the dies for the Cascade Lake-AP (56 Core) are in a Master-Slave configuration, I wonder if AMD has a single master die on Rome and Mattise

[pas008]

1 minute ago, S w a t s o n said:

Saw an interesting picture, the dies for the Cascade Lake-AP (56 Core) are in a Master-Slave configuration, I wonder if AMD has a single master die on Rome and Mattise

link?

[S w a t s o n]

10 minutes ago, pas008 said:

link?

https://www.nextplatform.com/2019/04/02/prying-open-the-lid-on-intels-multichip-cascade-lake-ap/

[pas008]

1 minute ago, S w a t s o n said:

https://www.nextplatform.com/2019/04/02/prying-open-the-lid-on-intels-multichip-cascade-lake-ap/

thank you

[Stefan Payne]

10 hours ago, Tedny said:

Wait, so, AMD will be 8 core ahead and with a lower price. again? 

lower price probably, socketed and about 200W less power consumption.

[mr moose]

14 hours ago, Tedny said:

Wait, so, AMD will be 8 core ahead and with a lower price. again? 

Maybe, still waiting for an actual product, but it does look as though AMD might finally be enjoying a performance lead like they did back in 2003/4 if all goes well.

 

 

[CarlBar]

18 hours ago, williamcll said:

Gonna be interesting to see how that xeon platinum compare with threadrippers.

 

Not really a fair comparison since the xeon has way more memory channels and PCIE lanes. EPYC owever is going to completely trash it.

[CarlBar]

1 hour ago, Tedny said:

it's server marker, cloud server market, more cores are better+ look like from CES AMD presentation, they can just put 128 core on that and we haven't seen anything on 3d stacking CPUs that AMD showed few years ago 

 

Your a bit behind the news, (fairs, fair i missed it till Adored mentioned it in a video though so not really complaining), one of AMD's EPYC customer did a presentation about why they're switching to EPYC from 28 core Xeon's. Showed a 2x28 core vs 1x64 core setup with an actual workload they use as the test and EPYC beat the Intel lineup even harder than the CES demo.

 

Which is where this 56 core kinda falls flat on it's face. It's not really an improvement over the existing 28 cores in IPC and you can only mount 2 to a board, (same as EPYC and incidentally half what the 28 core's can do), meaning they don't stand a chance of beating EPYC. And they draw more power, (really important in server setups), to boot.

[Stefan Payne]

11 minutes ago, Tedny said:

so, Epyc no brainer same as Threadripper for workstations? 

???

WIth the new Architecture AMD has the ability to make the 2, 4 or 8 Die Threadripper 

with each die having up to 8 Cores...

[pas008]

14 minutes ago, Tedny said:

so, Epyc no brainer same as Threadripper for workstations? 

i'd think for the most part but depends on software/what you are doing

[leadeater]

5 hours ago, CarlBar said:

Which is where this 56 core kinda falls flat on it's face. It's not really an improvement over the existing 28 cores in IPC and you can only mount 2 to a board, (same as EPYC and incidentally half what the 28 core's can do), meaning they don't stand a chance of beating EPYC. And they draw more power, (really important in server setups), to boot.

That's sort of a not really an only thing, 80% of the server market world wide is 2 socket servers which is why AMD doesn't mind designing their architecture and platform around supporting a maximum of 2 (for now).

 

There's still a fair decent amount of workloads that run much better on Intel as well, a dual 28 core is still able to outperform a dual 64 core EPYC in those cases. There's still a huge amount of things EPYC is great for though.

[Ithanul]

19 hours ago, leadeater said:

That's sort of a not really an only thing, 80% of the server market world wide is 2 socket servers which is why AMD doesn't mind designing their architecture and platform around supporting a maximum of 2 (for now).

 

There's still a fair decent amount of workloads that run much better on Intel as well, a dual 28 core is still able to outperform a dual 64 core EPYC in those cases. There's still a huge amount of things EPYC is great for though.

Interesting part is the 56c is techinically two dies in one socket.

 

Depending how software licensers view these setups.  Instead of paying license for 2P setup, a business may pay for one socket.  So, a business could see it as a way to save money that way.  Depends though if the software company charges by the socket or by the core.

 

Edit: Correction, two dies not four dies.  Darn picture tripped me up a bit.

[CarlBar]

19 hours ago, leadeater said:

That's sort of a not really an only thing, 80% of the server market world wide is 2 socket servers which is why AMD doesn't mind designing their architecture and platform around supporting a maximum of 2 (for now).

 

There's still a fair decent amount of workloads that run much better on Intel as well, a dual 28 core is still able to outperform a dual 64 core EPYC in those cases. There's still a huge amount of things EPYC is great for though.

 

Fair enough on the first point, as for the second, i wasn't saying that wouldn't be the case. I was just pointing out that in real world workloads, (which from what we know in this case are fairly AVX heavy), EPYC has a real advantage over Intels lineup. Previously all we had where synthetic benchmarks who's value was debatable at best. Now we know some real workloads will flat out favour AMD.

 

12 minutes ago, Ithanul said:

Interesting part is the 56c is techinically two dies in one socket.

 

Depending how software licensers view these setups.  Instead of paying license for 2P setup, a business may pay for one socket.  So, a business could see it as a way to save money that way.  Depends though if the software company charges by the socket or by the core.

 

Edit: Correction, two dies not four dies.  Darn picture tripped me up a bit.

 

Last i heard it was allways by the socket.

[Ithanul]

2 minutes ago, CarlBar said:

Last i heard it was allways by the socket.

Depends on software.

 

Microsoft with the Server 2016 release now charge by the core:  https://arstechnica.com/information-technology/2015/12/windows-server-2016-moving-to-per-core-not-per-socket-licensing/

[exetras]

6 minutes ago, Ithanul said:

Depends on software.

 

Microsoft with the Server 2016 release now charge by the core:  https://arstechnica.com/information-technology/2015/12/windows-server-2016-moving-to-per-core-not-per-socket-licensing/

This is correct, but it changes every once in a while, This is why per core performance is still king in Database operations and Core Count is king in VDI environments.

[leadeater]

4 hours ago, CarlBar said:

Fair enough on the first point, as for the second, i wasn't saying that wouldn't be the case. I was just pointing out that in real world workloads, (which from what we know in this case are fairly AVX heavy), EPYC has a real advantage over Intels lineup. Previously all we had where synthetic benchmarks who's value was debatable at best. Now we know some real workloads will flat out favour AMD.

Xeon Golds and above still have 2 AVX-512 FMA units so if you update your code to AVX-512 you're back to twice the AVX throughput of EPYC2. Zen2 at the architecture level has increased the AVX unit width to bring it back to parity with Intel but that's only technical specification, I wouldn't jump straight to the assumption that it's as good or better without actual tests to show that. We still have no idea of the implications of the I/O die and chiplets.

 

AVX until we get actual benchmarks across multiple different tests is still in Intel's favor because that is something we know and can prove as of now.

[leadeater]

4 hours ago, exetras said:

This is correct, but it changes every once in a while, This is why per core performance is still king in Database operations and Core Count is king in VDI environments.

And Microsoft currently only recommends that you use Intel CPUs because the SQL engine is tailored very well to Intel architecture where as there is no optimization for AMD yet.

[CarlBar]

4 hours ago, leadeater said:

Xeon Golds and above still have 2 AVX-512 FMA units so if you update your code to AVX-512 you're back to twice the AVX throughput of EPYC2. Zen2 at the architecture level has increased the AVX unit width to bring it back to parity with Intel but that's only technical specification, I wouldn't jump straight to the assumption that it's as good or better without actual tests to show that. We still have no idea of the implications of the I/O die and chiplets.

 

AVX until we get actual benchmarks across multiple different tests is still in Intel's favor because that is something we know and can prove as of now.

Adored actually explained this in his video. in the workloads they where running due to them being very heavily AVX based and the Intel chips downclocking when running AVX loads whilst EPYC doesn't, (and now has more cores to boot), it actually still ends up favouring epic.

[leadeater]

1 hour ago, CarlBar said:

Adored actually explained this in his video. in the workloads they where running due to them being very heavily AVX based and the Intel chips downclocking when running AVX loads whilst EPYC doesn't, (and now has more cores to boot), it actually still ends up favouring epic.

He doesn't actually know the performance though, speculation isn't reality. Reality is current Zen and Zen+ architectures running AVX2 is in actual real world is 2 times slower, sometimes more.

 

While we know what AMD has said about Zen2 we know no actual specifics about clocks, memory bandwidths, memory latency, boost and power tables. On top of that we also do not know how the chiplet design impacts other even more detailed areas like data caches and inter core communication. That's why anyone saying how things will shake out based on what is actually very limited information is likely incorrect and spreading false hope, being close enough doesn't make such a speculation correct indicating someone was worth listening to it just makes them yet another person willing to say things that should not be said with such confidence hence I'm not saying it. I have talked about the improvements before and in what ways improves performance but I've never then made any performance comparison claims against Intel because you just can't do that based on what is actually nothing.

 

And that's only AVX2, this doesn't address the other issue that AVX-512 when utilized is twice the performance. Zen2 is only addressing AVX2 performance disparity not AVX-512. However if you take in to consideration that AVX2 on older Broadwell-EP had a usable cores to memory channel ratio of 3.5, which is why most clusters used an Intel customized 14 core ( 4 channels x 3.5 = 14), neither Intel nor AMD are going to be blasting out full AVX2 performance across 56 or 64 cores with only 12 or 8 memory channels. Intel's frankenstein 56 core aside the standard Skylake-SP should be able to properly utilize 22 to 24 cores in AVX2. The only safe assumption here is that 8 channels is not going to supply all 64 Zen2 cores. The higher the performance the more memory bandwidth you need, for AVX you're always limited by memory bandwidth so it makes no real difference if AMD Zen2 cores are clock for clock as good because the number of channels is far below enough to supply 64 cores so the potential performance advantage if it can be realized is in the 2 extra memory channels. Bringing back in the 56 core Xeon frankenstein it has the advantage by having 4 more memory channels.

[CarlBar]

4 minutes ago, leadeater said:

He doesn't actually know the performance though, speculation isn't reality. Reality is current Zen and Zen+ architectures running AVX2 is in actual real world is 2 times slower, sometimes more.

 

While we know what AMD has said about Zen2 we know no actual specifics about clocks, memory bandwidths, memory latency, boost and power tables. On top of that we also do not know how the chiplet design impacts other even more detailed areas like data caches and inter core communication. That's why anyone saying how things will shake out based on what is actually very limited information is likely incorrect and spreading false hope, being close enough doesn't make such a speculation correct indicating someone was worth listening to it just makes them yet another person willing to say things that should not be said with such confidence hence I'm not saying it. I have talked about the improvements before and in what ways improves performance but I've never then made any performance comparison claims against Intel because you just can't do that based on what is actually nothing.

 

And that's only AVX2, this doesn't address the other issue that AVX-512 when utilized is twice the performance. Zen2 is only addressing AVX2 performance disparity not AVX-512. However if you take in to consideration that AVX2 on older Broadwell-EP had a usable cores to memory channel ratio of 3.5, which is why most clusters used an Intel customized 14 core ( 4 channels x 3.5 = 14), neither Intel nor AMD are doing to be blasting out full AVX2 performance across 56 or 64 cores with only 12 or 8 memory channels. Intel's frankenstein 56 core aside the standard Skylake-SP should be able to properly utilize 22 to 24 cores in AVX2. The only safe assumption here is that 8 channels is not going to supply all 64 Zen2 cores. The higher the performance the more memory bandwidth you need, for AVX you're always limited by memory bandwidth so it makes no real difference if AMD Zen2 cores are clock for clock as good because the number of channels is far below enough to supply 64 cores so the potential performance advantage if it can be realized is in the 2 extra memory channels. Bringing back in the 56 core Xeon frankenstein it has the advantage by having 4 more memory channels.

 

Adored used the customers own published realised GFLOP's performance numbers in their workloads with their existing intel hardware to base things on. Said user also explicitly stated the operating frequency of their rome chips in the presentation, (2.35Ghz).

 

Also if Memory bandwidth was the issue your claiming then how did the customer manage to beat the intel system with the rome system by roughly 20% despite the intel system having a 25% memory bandwidth advantage?

 

Yes i'm aware the workload almost certainly isn't fully AVX2, and the dual physichial processor nature of the intel system likely isn't doing intel any favours. But thats still a pretty massive swing in AMD's favour there, Effectively AMD are realising a 50% better per memory bandwidth performance advantage. The 56 core may have more memory bandwidth but it's not 50%. (And thats before we get into questions of how the dual die is setup and how that impacts it's ability to use the memory bandwidth it has).

 

 

On AVX-512. Brain fart at work, i'd got it into my head somehow that AVX1 was the 256 bit version and 2 was the 512. DoH!.

[leadeater]

6 minutes ago, CarlBar said:

 

Adored used the customers own published realised GFLOP's performance numbers in their workloads with their existing intel hardware to base things on. Said user also explicitly stated the operating frequency of their rome chips in the presentation, (2.35Ghz).

 

Also if Memory bandwidth was the issue your claiming then how did the customer manage to beat the intel system with the rome system by roughly 20% despite the intel system having a 25% memory bandwidth advantage?

 

Yes i'm aware the workload almost certainly isn't fully AVX2, and the dual physichial processor nature of the intel system likely isn't doing intel any favours. But thats still a pretty massive swing in AMD's favour there, Effectively AMD are realising a 50% better per memory bandwidth performance advantage. The 56 core may have more memory bandwidth but it's not 50%. (And thats before we get into questions of how the dual die is setup and how that impacts it's ability to use the memory bandwidth it has).

 

 

On AVX-512. Brain fart at work, i'd got it into my head somehow that AVX1 was the 256 bit version and 2 was the 512. DoH!.

Non-independent information isn't worth much at all, AMD will always pick a customer story running a workload (a, as in a single) that favors them the most.

 

And no that's not how memory bandwidth works. Data is data, it's not smaller or bigger. If you're running 256bit instructions you can just do the math to know how much bandwidth is required, there isn't anything AMD can do to change that.

 

Anyway watching the roast, back later.

[CarlBar]

Just now, leadeater said:

Non-independent information isn't worth much at all, AMD will always pick a customer story running a workload (a, as in a single) that favors them the most.

 

And no that's not how memory bandwidth works. Data is data, it's not smaller or bigger. If you're running 256bit instructions you can just do the math to know how much bandwidth is required, there isn't anything AMD can do to change that.

 

Anyway watching the roast, back later.

 

My understanding is the presentation was done by the company buying the chips, not by AMD. So the info in it was independent. (And the rest of the info was from pre existing sources also unaffiliated with AMD). Thats what makes this demo so interesting. Where not getting an AMD canned demo showing best case scenario. Where getting an end user talking about and demoing how it actually helps them and hence why they've gone with EPYC Rome.

 

Also i'm aware data is data. I have no clue how AMD are doing it, but the point is they are. 

 

Also enjoy the food :D.

[Taf the Ghost]

@leadeater even on 8 memory channels with the new Cascade Lake-SP, AVX512 is still going to be memory bandwidth limited. It's really more DDR5 tech. Though AMD's official position, right now, is if you want to run highly vectorized code, you really should be using a GPU. (AMD would love to sell you a platform to install Accelerators on, as well.) That came from AMD's Enterprise VP at a conference recently.