Intel Core i9 Processors Might be Incoming

[othertomperson]

5 hours ago, RadiatingLight said:

The i9 name seems absolutely retarded. no way.

Why? It's never made sense for the HEDT to be given the next generation's i7 nomenclature. Calling it i9 at least distances it in a sensible way.

 

 

[RadiatingLight]

4 minutes ago, othertomperson said:

Why? It's never made sense for the HEDT to be given the next generation's i7 nomenclature. Calling it i9 at least distances it in a sensible way.

 

 

But... you could just call it HEDT.

or if the rumors are true, call them all eXtreme edtion.

[vtecmastery]

5 hours ago, Coaxialgamer said:

If you think the 1700$ cpu is bad , you should look at this .The 6950x is far from the most expensive consumer cpu they ever made  

3000$ with inflation

http://www.cpu-world.com/CPUs/Pentium-II/Intel-Pentium II 300 - 80522PX300512EC (B80522P300512E).html

I had a pentium 2.

Was playing counter strike 1.5 on it, with a dedicated gpu I bought with my own money as a kid,

Was awesome

[Dabombinable]

4 hours ago, Godlygamer23 said:

I'm moving this to the CPUs, Motherboards, and Memory sub-forum as even though we might allow for rumors in the Tech News sub-forum, this is likely not to be true at all. 

Its still more credible than other rumours that moderators have allowed in the tech news and reviews section, and since its in WAN show, it really should be moved back.

[kameshss]

4 hours ago, Godlygamer23 said:

I'm moving this to the CPUs, Motherboards, and Memory sub-forum as even though we might allow for rumors in the Tech News sub-forum, this is likely not to be true at all. 

haha man. This news almost published in every news websites. The cache numbers might not be true, these numbers could've been from engineering samples or something. Not sure. I feel like this deserves place in Tech News.

[done12many2]

22 minutes ago, Dabombinable said:

Its still more credible than other rumours that moderators have allowed in the tech news and reviews section, and since its in WAN show, it really should be moved back.

 

As I mentioned earlier, it's going to be interesting if we find out that the cache numbers are correct for good reason. 

 

Take from one area to improve another. 

[TheCherryKing]

There's only 16.5 MB of cache for a 12 Core processor? Even the four year old Ivy-Bridge based Xeon processors can put the new Core i9 processors to shame.

[AntonChigurh]

7 hours ago, dexT said:

Let me smell the cardboard that the box will be made out of.

Fine

[DildorTheDecent]

Core i9 was already rumoured years ago when it where originally releasing the 6 core parts iirc. 

[snortingfrogs]

Seems like I will be getting an i9 rig later this summer then =)

[79wjd]

14 hours ago, yian88 said:

The glory days are long gone when you could buy an AMD Athlon dual-core or intel core 2 duo for <100$,

The cheapest C2D was $110~. 

14 hours ago, yian88 said:

or 1st gen i5 120$

The cheapest first gen i5 was $177. 

14 hours ago, yian88 said:

Nowdays its just rip off 400$ i7 or 150$ dual core i3, meh, 4 core ryzen 1400 200$+? no ty.

Or a $65 G4560 that is more than capable of keeping up with a mid range gpu. 

 

A 1400 is $160. 

[NumLock21]

Some numbers should not be on products, especially when there is a i in front of it. i9 just don't sound right, the same reason, there is no i6.

[othertomperson]

15 hours ago, RadiatingLight said:

But... you could just call it HEDT.

or if the rumors are true, call them all eXtreme edtion.

Colloquially people did, but technically only the very top HEDT product was ever officially called Extreme Edition (3960X, 4960X, 5960X, 6950X).

 

I dunno, this just makes more sense to me. Mind you, I never understood why Radeon's R5, R7 and R9 branding got so much hate. I don't see the difference between that and i3, i5, i7 and now i9, or Ryzen 3, 5 and 7. It's just clearly displaying the market segmentation, and calling both the mainstream and HEDT "i7"s isn't accurate.

[RadiatingLight]

3 minutes ago, othertomperson said:

Colloquially people did, but technically only the very top HEDT product was ever officially called Extreme Edition (3960X, 4960X, 5960X, 6950X).

 

I dunno, this just makes more sense to me. Mind you, I never understood why Radeon's R5, R7 and R9 branding got so much hate. I don't see the difference between that and i3, i5, i7 and now i9, or Ryzen 3, 5 and 7. It's just clearly displaying the market segmentation, and calling both the mainstream and HEDT "i7"s isn't accurate.

Well the leaks say that they all have an X, so they're all eXtreme edition.

[othertomperson]

Just now, RadiatingLight said:

Well the leaks say that they all have an X, so they're all eXtreme edition.

So?

[lolfail9002]

16 hours ago, Godlygamer23 said:

The name, and the cache size. As far as I'm concerned, no engineer would use 13.75MB as a cache number, nor 16.5MB. They would use nice, divisible numbers.

Intel Skylake-X/W/SP cache FAQ:

• What are Skylake-X/W/SP?
  • Skylake-X/W/SP are server-derived processors based on the "Skylake" microarchitecture (aka 6/7/8-th generation Core).
  • Skylake-X/W are for single-socket HEDT and workstation. Skylake-SP replaces E5 and E7 for multi-socket servers.
• Why are the L3 cache sizes funny numbers in Skylake-X/W/SP?
  • L3 cache size in Skylake-X/W/SP is 1.375 MB per core. A 10-core processor will have 13.75 MB of L3 cache, and the full 28-core die will have 38.5 MB of L3 cache.
• Why did Intel reduce the cache size in Skylake-X/W/SP?
  • The total cache size did not decrease with Skylake-X/W/SP. Previously, server-derived processors had 256 kB of L2 cache and 2.5 MB of L3 cache per core. The L3 cache was inclusive of L2, so the total memory cached was 2.5 MB per core.
  • Skylake-X/W/SP revises the cache hierarchy so that L2 is 1 MB in size and L3 is 1.375 MB in size. L3 is now exclusive of L2, so the total memory cached is now 2.375 MB per core, an insignificant difference.
• Why did Intel redesign the cache hierarchy for Skylake-X/W/SP?
  • Since Haswell-EP/EX, bandwidth to the L3 cache has been a limiting factor for scaling up workloads. The L3 bandwidth is independent of the core count, so processors with higher core counts face L3 bandwidth starvation. In addition, the power intensive nature of the L3 limited the uncore clock frequency to ~2.4 GHz, further reducing the bandwidth available.
  • Scaling to 28 cores in Skylake-SP and beyond was not sustainable with 2.5 MB per core.
• How come AMD Zen can support 32 cores with 2 MB of L3 cache per core?
  • Zen is fundamentally a 4-core architecture. The L3 caches of the 4-core modules are not unified, and accesses to memory cached on other cores incurs a penalty.
  • 16-core and 32-core Zen processors will consist of bundles of 8-core processors, which themselves consist of independent 4-core modules. Scaling of traditional workstation and Big Iron workloads will be lesser compared to Intel Xeon-SP processors.
• Will Skylake-X/W/SP have 10% or more IPC compared to Skylake client processors?
  • No.

[Mooshi]

Now consumers can have a sweet chip that cost 2k that Intel will tell them to not overclock. ?

[done12many2]

33 minutes ago, lolfail9002 said:

Intel Skylake-X/W/SP cache FAQ:

• What are Skylake-X/W/SP?
  • Skylake-X/W/SP are server-derived processors based on the "Skylake" microarchitecture (aka 6/7/8-th generation Core).
  • Skylake-X/W are for single-socket HEDT and workstation. Skylake-SP replaces E5 and E7 for multi-socket servers.
• Why are the L3 cache sizes funny numbers in Skylake-X/W/SP?
  • L3 cache size in Skylake-X/W/SP is 1.375 MB per core. A 10-core processor will have 13.75 MB of L3 cache, and the full 28-core die will have 38.5 MB of L3 cache.
• Why did Intel reduce the cache size in Skylake-X/W/SP?
  • The total cache size did not decrease with Skylake-X/W/SP. Previously, server-derived processors had 256 kB of L2 cache and 2.5 MB of L3 cache per core. The L3 cache was inclusive of L2, so the total memory cached was 2.5 MB per core.
  • Skylake-X/W/SP revises the cache hierarchy so that L2 is 1 MB in size and L3 is 1.375 MB in size. L3 is now exclusive of L2, so the total memory cached is now 2.375 MB per core, an insignificant difference.
• Why did Intel redesign the cache hierarchy for Skylake-X/W/SP?
  • Since Haswell-EP/EX, bandwidth to the L3 cache has been a limiting factor for scaling up workloads. The L3 bandwidth is independent of the core count, so processors with higher core counts face L3 bandwidth starvation. In addition, the power intensive nature of the L3 limited the uncore clock frequency to ~2.4 GHz, further reducing the bandwidth available.
  • Scaling to 28 cores in Skylake-SP and beyond was not sustainable with 2.5 MB per core.
• How come AMD Zen can support 32 cores with 2 MB of L3 cache per core?
  • Zen is fundamentally a 4-core architecture. The L3 caches of the 4-core modules are not unified, and accesses to memory cached on other cores incurs a penalty.
  • 16-core and 32-core Zen processors will consist of bundles of 8-core processors, which themselves consist of independent 4-core modules. Scaling of traditional workstation and Big Iron workloads will be lesser compared to Intel Xeon-SP processors.
• Will Skylake-X/W/SP have 10% or more IPC compared to Skylake client processors?
  • No.

 

Sounds like less wasted cycles heading our way.  

[Foxxer]

i9 is just a number.

[Godlygamer23]

59 minutes ago, lolfail9002 said:

Intel Skylake-X/W/SP cache FAQ:

• What are Skylake-X/W/SP?
  • Skylake-X/W/SP are server-derived processors based on the "Skylake" microarchitecture (aka 6/7/8-th generation Core).
  • Skylake-X/W are for single-socket HEDT and workstation. Skylake-SP replaces E5 and E7 for multi-socket servers.
• Why are the L3 cache sizes funny numbers in Skylake-X/W/SP?
  • L3 cache size in Skylake-X/W/SP is 1.375 MB per core. A 10-core processor will have 13.75 MB of L3 cache, and the full 28-core die will have 38.5 MB of L3 cache.
• Why did Intel reduce the cache size in Skylake-X/W/SP?
  • The total cache size did not decrease with Skylake-X/W/SP. Previously, server-derived processors had 256 kB of L2 cache and 2.5 MB of L3 cache per core. The L3 cache was inclusive of L2, so the total memory cached was 2.5 MB per core.
  • Skylake-X/W/SP revises the cache hierarchy so that L2 is 1 MB in size and L3 is 1.375 MB in size. L3 is now exclusive of L2, so the total memory cached is now 2.375 MB per core, an insignificant difference.
• Why did Intel redesign the cache hierarchy for Skylake-X/W/SP?
  • Since Haswell-EP/EX, bandwidth to the L3 cache has been a limiting factor for scaling up workloads. The L3 bandwidth is independent of the core count, so processors with higher core counts face L3 bandwidth starvation. In addition, the power intensive nature of the L3 limited the uncore clock frequency to ~2.4 GHz, further reducing the bandwidth available.
  • Scaling to 28 cores in Skylake-SP and beyond was not sustainable with 2.5 MB per core.
• How come AMD Zen can support 32 cores with 2 MB of L3 cache per core?
  • Zen is fundamentally a 4-core architecture. The L3 caches of the 4-core modules are not unified, and accesses to memory cached on other cores incurs a penalty.
  • 16-core and 32-core Zen processors will consist of bundles of 8-core processors, which themselves consist of independent 4-core modules. Scaling of traditional workstation and Big Iron workloads will be lesser compared to Intel Xeon-SP processors.
• Will Skylake-X/W/SP have 10% or more IPC compared to Skylake client processors?
  • No.

Can you provide a link please? 

[done12many2]

3 minutes ago, Godlygamer23 said:

Can you provide a link please? 

 

He's obviously leaking the info to us.  1st post and it happens to be this?  

[lolfail9002]

5 hours ago, Godlygamer23 said:

Can you provide a link please? 

Is there a specific aspect of which you are skeptical? The information I provided is based on publicly available leaks and some common sense.

 

Factual claims:

Skylake-X/W/SP branding: look for the original leaked slides of Purley

L3 cache sizing: the Xeon Gold/Platinum lineup was leaked a while back, and it includes the cache size

L2 cache sizing: look for SiSoft benchmarks of Xeon Platinum 8180

Zen: read Anandtech or other review

 

Interpretations:

cache redesign reason: if you look at some old reviews of Haswell-EP, it's fairly clear that the L3 can't grow forever

Skylake-X/W/SP IPC: common sense, but you can also rent a virtual machine from Google and confirm it yourself

[Godlygamer23]

1 hour ago, lolfail9002 said:

Is there a specific aspect of which you are skeptical? The information I provided is based on publicly available leaks and some common sense.

Then show me those leaked slides. I looked up the FAQ using Google, expecting to find something, but found absolutely nothing, so here I am asking you for links to support your claims.

 

Just because it can't grow doesn't mean Intel would use a weird number like that. And even so, what do you mean it can't grow "forever"? You can increase the portion of the die responsible for L3 cache. Yes, you might get a bigger die, but the tradeoff might be worth it. 

 

I'm not renting a virtual machine from Google. If I have to spend money to prove it, I'm probably not going to do it because it could be absolute nonsense. 

 

Another thing about the cache size. Why would Intel choose 16.75MB as their number(even basing it around cache size limit) when the 5960X has 20MB of L3 cache, and it has less cores than the supposed 12 core version.

Spoiler

 

[lolfail9002]

If you don't want to believe, I can't make you. You can enter "Platinum 8180" into SiSoft and see most of the details. The reason the L3 cache needs to be reduced is because it was already too slow in Haswell-EP, which had only 18 cores. To overcome the L3 bottleneck, the L2 cache was increased to reduce the reliance on a single unified cache. Notice how the sum of L2 and L3 is almost exactly the same as the previous L3. The 5960X and other small cores are not proof of anything, as Intel only designs for the largest die and produces other processors by cutting it.
 

EDIT: It's even on the first page of results. Here.

[Centurius]

On 2017-5-12 at 8:52 PM, RadiatingLight said:

The i9 name seems absolutely retarded. no way.

 

other than that, we all knew that X299 and Skylake-X was coming. but they will be way more expensive than Ryzen.

i3/5/7 or most other tech naming schemes aren't?