We're now squishing even more on a 14nm die! (Just another day at Intel) Comet Lake!

[Misanthrope]

18 hours ago, CarlBar said:

Intel's 14nm process is basically on par with most other's 10nm process. Intel processes generally have higher logic density at a given node size.

True but we're likely months away from AMD moving to 7nm afaik which may or may not be on par with intel's 10nm which is still AWOL as of today.

 

So even if right now there isn't much of a difference worth discussing (Or one that's on favor of intel having the upper hand even with 14nm today) That might change very quickly in terms of how technology is moving they might lose a lot of the advantage they have right now if AMD gets to 7nm before intel gets to 10nm it basically means that no matter how you cut it AMD has the upper hand and intel can probably just tie but not surpass. This is a long cry for years of intel being very far and away the superior fab processes that contributed a lot to their continued dominance.

[Linus_torvalds]

3 hours ago, LeSheen said:

actually its the opposite. Smaller proces is less current needed so less excess heat produced.

And more overclocking headroom as a result.

It's not smaller proces! It's the same, but some parts are closer thus more temperatures!

[GoldenLag]

16 minutes ago, mate_mate91 said:

It's not smaller proces! It's the same, but some parts are closer thus more temperatures!

actually its less heat generated, but in a smaller area. we dont know if it is going to be hotter before AMD reveals clocks and more. 

 

nvm

[Nicnac]

4 minutes ago, GoldenLag said:

actually its less heat generated, but in a smaller area. we dont know if it is going to be hotter before AMD reveals clocks and more. 

You are talking about Zen2

13 minutes ago, mate_mate91 said:

It's not smaller proces! It's the same, but some parts are closer thus more temperatures!

You are talking about the processor in the news article (Intel 14nm)

 

(Seemed like you are talking past each other^^)

[GoldenLag]

2 minutes ago, Nicnac said:

You are talking about Zen2

fudge!

 

sorry, dont know why i didnt catch that

[Froody129]

*laughs in 4th gen*

[Bcat00]

Makes me wonder what sort of performance they intend to squish out of this size at this point. 

They've been at 14 for a while now

[Brooksie359]

58 minutes ago, CarlBar said:

 

Um no it's not pure speculation. Unlike you i apparently have an idea about the laws of physics. Based on that we flat out know that neither intel nor AMD are at the limit of the theoretical on their latency.

 

That leave the two design factors to get in the way. Bandwidth and routing hardware latency. The thing is both of those are entirely dependent on the quality of the design of various component in the links. The thing is that hardware is not magically going to get way worse because you move it to a chiplet design. So we know intel is capable of producing a low latency chiplet design. They have to screw up by the numbers to not do so.

 

Now Comet Lake i think will have some issues if it's a 2 die design, but thats because they're functionally taking existing tech and littrially gluing it together, it's going to be a massive bodge job, with obvious consequences compared to a designed from the ground up solution. Though in theory if they do it right they should still only have bad latency between a few of the cores.

I see that you don't understand the meaning of speculation...

[NumLock21]

[cj09beira]

5 hours ago, GoldenLag said:

possibility of wx branding on CPUs using 3 dies (1 IO and 2 Core dies). regular x and non-x might just go up to 8 cores and only having 2 dies present. a single IO die and a single core dies. 

 

4 core dies will be too large to fit. and wasting silicon on "dummy-dies"

 

the 10 core rumours from intel are telling us a lot considering AMD has been tight on info about Ryzen. Intel probably knows a lot more than we do, and paying attention to both of them we can probably deduct what is coming in the following years. 

my bet is 16 core is incoming 

4 hours ago, CarlBar said:

 

The real catch with all of that is that AMD has hinted but not quite come out and confirmed that each 8 core chiplet is one ccx.

i have seen everything available for the public there is no hint at all, what are you considering a hint?

3 hours ago, GoldenLag said:

Nothing confirmed. Only speculation afaik.

 

Its possible and somewhat likely

i would not say that is likely considering the benefits would be small (have downsides too) and would make optimizing for zen a mess

3 hours ago, Brooksie359 said:

Didn't they confirm that each chiplet had 8 cores when they showed off the 64 core server cpu? I am unsure what that would mean for ccx though. 

ccx on Zen like a super core, its a group of 4 cores that have everything from core logic to L3 cache, these are then connected together in pairs to make the zeppelin die, and in the apu there is a single one of them, 

3 hours ago, LeSheen said:

actually its the opposite. Smaller proces is less current needed so less excess heat produced.

And more overclocking headroom as a result.

not really true because heat density is more important and that will probably go up quite a bit, but it wont be noticeable on this case because 12nm/14nm Sucks at clocking high 

[cj09beira]

25 minutes ago, NumLock21 said:

here i fixed it

[CarlBar]

24 minutes ago, cj09beira said:

i have seen everything available for the public there is no hint at all, what are you considering a hint?

 

There was an interview with one of the AMD people after their tech conference and whilst he refused to confirm or deny the CCX count of the chiplets he otherwise talked about each chiplet strictly in the sense of 8 cores. Various people commented that in theory if AMD was being completely honest some of the things he talked about should have been talked about in a 4 core ccx format if they were using 2x4 core ccx's Obviously AMD could have been dishonest to muddy the waters but if we give them the benefit of the doubt it's probable but not confirmed.

 

29 minutes ago, Brooksie359 said:

I see that you don't understand the meaning of speculation...

 

And i see you don't understand the concept of hard provable facts. It's a hard provable fact that intel can design an intercore communicaitions system with good latencies. We know this because they've actually gone out and done it. And the technologies involved in linking chiplets are not in a functional hardware sense any different so there is zero reason intel could not produce a chiplet design with excellent latency. Thats not to say they would. But there's no reason they could not do so.

[Brooksie359]

4 minutes ago, CarlBar said:

 

There was an interview with one of the AMD people after their tech conference and whilst he refused to confirm or deny the CCX count of the chiplets he otherwise talked about each chiplet strictly in the sense of 8 cores. Various people commented that in theory if AMD was being completely honest some of the things he talked about should have been talked about in a 4 core ccx format if they were using 2x4 core ccx's Obviously AMD could have been dishonest to muddy the waters but if we give them the benefit of the doubt it's probable but not confirmed.

 

 

And i see you don't understand the concept of hard provable facts. It's a hard provable fact that intel can design an intercore communicaitions system with good latencies. We know this because they've actually gone out and done it. And the technologies involved in linking chiplets are not in a functional hardware sense any different so there is zero reason intel could not produce a chiplet design with excellent latency. Thats not to say they would. But there's no reason they could not do so.

Again it's still speculation. A new architecture changes things alot and to say that they would make an architecture that would outdo AMD Zen is 100% speculation. Of course anything is possible but the point is that nobody knows how a chiplet design would turn out for Intel. I mean look at 10nm and how much they are struggling when they had been ahead of the curve in terms of process nodes for so long. Now they will be behind even more than they already are as 7nm is already being produced which is about the equivalent of the 10nm they are shooting for. You want to say that Intel would be crushing AMD of they had a chiplet design when in reality you have no idea. Again if you want to speculate you very well can but it is still speculation. 

[Nicnac]

This just in: 

https://wccftech.com/amds-next-gen-zen-2-7nm-cpu-core-to-feature-double-l3-cache-size/

 

I updated the Original post

 

[CarlBar]

2 minutes ago, Brooksie359 said:

Again it's still speculation. A new architecture changes things alot and to say that they would make an architecture that would outdo AMD Zen is 100% speculation. Of course anything is possible but the point is that nobody knows how a chiplet design would turn out for Intel. I mean look at 10nm and how much they are struggling when they had been ahead of the curve in terms of process nodes for so long. Now they will be behind even more than they already are as 7nm is already being produced which is about the equivalent of the 10nm they are shooting for. You want to say that Intel would be crushing AMD of they had a chiplet design when in reality you have no idea. Again if you want to speculate you very well can but it is still speculation

 

Let me try an alternate example from another tech industry to try and get my point across.

 

Back in World war 2 Rolls Royce made a whole slew of different aircraft engines. The most famous of those was of course the Rolls Royce Merlin which was in production from before the war up until the end of the war. It continually advanced in performance and was a well regarded engine throughout the war in all it's variants.

 

Mid-way through the war they produced the Rolls Royce Vulture. It was an absolute dog of an engine.

 

The Rolls Royce Vulture however in no way stopped Rolls Royce from producing and improving the merlin before, during, and after the vultures production run.

 

 

At the end of the day going from a monolithic to a chiplet design does not radically alter the underlying hardware design requirements to hit a certain performance level, a very minor falloff due to the phisyichilly longer interconnects adding a very small amount of latency is to be expected, but beyond that if Intel just takes somthing designed the same as their existing hardware and disorders it into separate dies for IO and CPU's they absolutely should be able to come within a couple of percentage points of their current stuff.

 

Intel hasn't done it so far because they haven't seen any need. Zen1 clearly caught Intel at least partially flat footed and they've been scrambling to catch up ever since.

[FPSwithaWacomTablet]

On 11/25/2018 at 12:08 PM, suicidalfranco said:

tic toc toc toc toc toc toc toc toc toc toc toc toc toc toc toc toc toc toc ...

 

[FPSwithaWacomTablet]

19 hours ago, manikyath said:

maybe it'll come on a socket the size of a small airfield, and noctua will make a cooler specificly for it, constructed with ablator heat shields.

Liquid cooling would come in the form of molten sodium. 

 

Playing it safe, I guess..

[Brooksie359]

4 minutes ago, CarlBar said:

 

Let me try an alternate example from another tech industry to try and get my point across.

 

Back in World war 2 Rolls Royce made a whole slew of different aircraft engines. The most famous of those was of course the Rolls Royce Merlin which was in production from before the war up until the end of the war. It continually advanced in performance and was a well regarded engine throughout the war in all it's variants.

 

Mid-way through the war they produced the Rolls Royce Vulture. It was an absolute dog of an engine.

 

The Rolls Royce Vulture however in no way stopped Rolls Royce from producing and improving the merlin before, during, and after the vultures production run.

 

 

At the end of the day going from a monolithic to a chiplet design does not radically alter the underlying hardware design requirements to hit a certain performance level, a very minor falloff due to the phisyichilly longer interconnects adding a very small amount of latency is to be expected, but beyond that if Intel just takes somthing designed the same as their existing hardware and disorders it into separate dies for IO and CPU's they absolutely should be able to come within a couple of percentage points of their current stuff.

 

Intel hasn't done it so far because they haven't seen any need. Zen1 clearly caught Intel at least partially flat footed and they've been scrambling to catch up ever since.

Again they would have to create a new architecture at which point who knows how well it will perform compared to the ring bus architecture. Also the architecture can have an impact on frequency just look at bulldozer to Zen. It is entirely possible that the new architecture for a chiplet design would result in power clocks or ipc compared to the ring bus design. It's easy to say that they would make a great chiplet designed architecture that would hit the same high frequencies while having low latency and high ipc but the reality is you don't know. If you want to speculate you can but it is nothing more than that. 

[Jito463]

On 11/25/2018 at 10:53 AM, dizmo said:

And yet...I have a feeling they might still beat the equivalent AMD chip. People love bashing Intel for this, yet AMD was falling flat on their face for years.

To be fair, even at their peak in the Athlon64 days, AMD always played second fiddle to Intel in profits.  During the whole OEM sales fiasco, when Intel was literally bribing OEMs not to include AMD (or to barely include them), Intel's marketing division alone spent more money than AMD made in a year.

On 11/25/2018 at 11:08 AM, suicidalfranco said:

tic toc toc toc toc toc toc toc toc toc toc toc toc toc toc toc toc toc toc ...

More like

tic

toc

toc+

toc++

toc+++

toc++++

toc+++++

toc++++++

toc+++++++

etc.

[dizmo]

1 hour ago, Jito463 said:

To be fair, even at their peak in the Athlon64 days, AMD always played second fiddle to Intel in profits.  During the whole OEM sales fiasco, when Intel was literally bribing OEMs not to include AMD (or to barely include them), Intel's marketing division alone spent more money than AMD made in a year.

They really should have gone after the server market more aggressively.

[Arika]

I wonder if the day will come where we can have a normal Intel thread and stay on topic and not turn it into a flame war of Intel vs AMD

 

 

 

 

[mynameisjuan]

1 minute ago, Arika S said:

I wonder if the day will come where we can have a normal Intel thread and stay on topic and not turn it into a flame war of Intel vs AMD

Intel vs AMD

Windows vd MacOS

Android vs IOS

Nvidia vs AMD

 

Instant flame war any time anyone mentions the competitor. 

[CarlBar]

2 hours ago, Brooksie359 said:

Again they would have to create a new architecture at which point who knows how well it will perform compared to the ring bus architecture. Also the architecture can have an impact on frequency just look at bulldozer to Zen. It is entirely possible that the new architecture for a chiplet design would result in power clocks or ipc compared to the ring bus design. It's easy to say that they would make a great chiplet designed architecture that would hit the same high frequencies while having low latency and high ipc but the reality is you don't know. If you want to speculate you can but it is nothing more than that. 

 

Except no new microarchitecture is required. Thats the point. All chiplet design does is move the physical locations of various components around. It dosen;t change much else. AMD's Infinity Fabric is simply a naming convention for their form of implementation of a CPU to IO and CPU to CPU interconnect solution. Intel could absolutely stick to their existing ring bus design if they wanted.

[Brooksie359]

1 minute ago, CarlBar said:

 

Except no new microarchitecture is required. Thats the point. All chiplet design does is move the physical locations of various components around. It dosen;t change much else. AMD's Infinity Fabric is simply a naming convention for their form of implementation of a CPU to IO and CPU to CPU interconnect solution. Intel could absolutely stick to their existing ring bus design if they wanted.

Except it would require one. 

[CarlBar]

3 minutes ago, Brooksie359 said:

Except it would require one. 

 

Except it wouldn't, nothing about chiplet implementation requires a different microarchitecture. There is zip, zero, nada need for a different microarchitecture. How the CPU functions internally hasn't changed one iota, just where the bits and pieces are in the physical world.