AMD Clarifies Why Threadripper Uses 4 Silicon Dies

[ConnorDahne]

1 minute ago, Swatson said:

Well he did have permission and then lost it. He explained the whole amd germany vs amd global in his livestream Q/A video.

completely missed that one, thank you

[sgloux3470]

52 minutes ago, Lord Nicoll said:

Those dies cost money, the wafers they're cut from are not cheap, the indium soldering process is also expensive, indium only wets to gold, gold won't wet to silicon either, you have to vapour deposit I think it's vanadium oxide then titanium and then gold to get the indium to stick to the silicon die, and the IHS needs a gold plating, and indium isn't cheap either, that is a lot of expense for two dummy dies, I'm not totally convinced. 

With the margins they're likely making on Threadripper the cost likely justifies itself.

[Lord Nicoll]

1 minute ago, sgloux3470 said:

With the margins they're likely making on Threadripper the cost likely justifies itself.

with the initial cost and all, I wouldn't be surprised is AMD is only breaking even including the development costs of Ryzen, and only making a profit from the massive amounts of sales, but they could also have found other ways to reduce costs, like the multi die packages, I think the lower end Ryzen chips potentially loose them money, we won't know for many years until that comes out. 

[DiaSin]

21 minutes ago, Dash Lambda said:

Highlight the text in the quote and remove formatting.

I did that when I initially posted the thread. 

[Hunter259]

And they couldn't have made a smaller socket why? This isn't the first multi die CPU. Instead we get a socket the size of Trump's Ego.

[S w a t s o n]

57 minutes ago, Hunter259 said:

And they couldn't have made a smaller socket why? This isn't the first multi die CPU. Instead we get a socket the size of Trump's Ego.

They did make a smaller socket, it's called AM4. They know they are going to have Threadripper parts at up to 32 cores just like Epyc. Epyc is on a "different" socket because it has to support dual socket features and more. Intel just likes to hyper fragment their market by having 4382948239 sockets.

 

As an aside:
The whole "Epyc is glued together desktop dies" is basically true, just as it is for Threadripper. The full 8 core, 2 CCX die is called Zeppelin, and Epyc /Threadripper are using 4 zeppelin dies while Ryzen (3, 5, and 7) uses 1 Zeppelin. This allows AMD to serve every market segment by producing one die and binning them, then using Infinity Fabric to connect them, it's pretty ingenious imo.

The thing is it's also true for most Xeon's (replace "dies" with "cores"). Intel just enables/disables some features/tweaks based on how much you're paying. They dont seem glued together because it's one big die but it's still just a bunch of the same cores you can find in a consumer product, they just "glue" them together at the die level using ringbus. Their 18 core planned i9 is just a cut down Xeon 22 core die IIRC.

[MoonSpot]

1 hour ago, DiaSin said:

I'm aware. It does the same for me, now that I'm on the night theme, but it IS set to automatic. Like I said, I don't know why it isn't working. 

Edit the post, highlight the text in question, Ctrl+X, Ctrl+SHIFT+V.

Alternatively normally a text pop-up creeps up when you're creating a post a second or 2 after pasting in the reply box where you're asked if you want to auto-magically remove formatting.  Clicking "YES - remove formatting" is about the easiest way to do it.

[Masada02]

Say what you will, but AMD's Zen based lineup is a textbook case of manufacturing prowess and innovation with the intent to reduce manufacturing cost while providing a quality product. They use a single, low cost, die for everything and compete well in all markets they've entered. Sure it's not the most high-end solution, as Intel still has that; but God damn it's impressive what they have been able to accomplish with Zen.

[zMeul]

3 minutes ago, Masada02 said:

Say what you will, but AMD's Zen based lineup is a textbook case of manufacturing prowess and innovation with the intent to reduce manufacturing cost while providing a quality product. They use a single, low cost, die for everything and compete well in all markets they've entered. Sure it's not the most high-end solution, as Intel still has that; but God damn it's impressive what they have been able to accomplish with Zen.

to be translated: TSMC's process is so shit and unreliable that AMD can't produce big dies and have to use dead dies to offset the IHS balance

[Drak3]

1 hour ago, Hunter259 said:

And they couldn't have made a smaller socket why? This isn't the first multi die CPU. Instead we get a socket the size of Trump's Ego.

Cost, and it gives a use to the few dead/worthless dies that AMD gets once in a blue moon with Zen.

[Jito463]

2 hours ago, Swatson said:

Honestly, I'm not sure why AMD doesn't just admit that Threadripper will eventually have SKU's with more than 16 cores to compete with intel's x299 18 core+ chips, using 3 or all 4 dies. It seems fairly obvious to me.

I don't see that at all.  Each die has 2 memory channels.  Every die you add, adds 2 more channels.  With TR, they're running quad channel because they have 2 dies.  If they add more dies, then they add more channels, and the boards aren't equipped for sextuple or octuple channel RAM.

6 minutes ago, zMeul said:

to be translated: TSMC's process is so...unreliable that AMD can't produce big dies and have to use dead dies to offset the IHS balance

AMD could have produced a monolithic die, but it would have cost more money, especially with the wasted dies (large, monolithic dies are prone to higher failure rates, just ask Intel).  By producing smaller dies and chaining them together, they're able to produce much the same effect at a far lower cost.

 

Then again, I shouldn't expect any kind of objective response from you, when it comes to AMD.

[leadeater]

10 minutes ago, zMeul said:

TSMC's process is so shit

TSMC?

[S w a t s o n]

3 minutes ago, Jito463 said:

I don't see that at all.  Each die has 2 memory channels.  Every die you add, adds 2 more channels.  With TR, they're running quad channel because they have 2 dies.  If they add more dies, then they add more channels, and the boards aren't equipped for sextuple or octuple channel RAM.

 

The channels dont have to be used. I agree with everything else 100%

[Jito463]

1 minute ago, Swatson said:

The channels dont have to be used. I agree with everything else 100%

I'm not even sure if it's possible for them to use a die without the memory controller, but I suppose we'll just have to wait and see.

 

By the by, I've been meaning to say for a while now, your avatar gif is really, really creepy and disturbing (which I'm fairly sure is what you were going for, but just so you knew).

[S w a t s o n]

Just now, Jito463 said:

I'm not even sure if it's possible for them to use a die without the memory controller, but I suppose we'll just have to wait and see.

 

By the by, I've been meaning to say for a while now, your avatar gif is really, really creepy and disturbing (which I'm fairly sure is what you were going for, but just so you knew).

They can choose to disable the memory controller, I'm almost certain. and thanks!

[DocSwag]

2 hours ago, Lord Nicoll said:

Those dies cost money, the wafers they're cut from are not cheap, the indium soldering process is also expensive, indium only wets to gold, gold won't wet to silicon either, you have to vapour deposit I think it's vanadium oxide then titanium and then gold to get the indium to stick to the silicon die, and the IHS needs a gold plating, and indium isn't cheap either, that is a lot of expense for two dummy dies, I'm not totally convinced. 

They had no transistors, who said they even need the wafers?

2 hours ago, Swatson said:

Yea I saw der8auer talking about it and based on what he said and what I can find on the whole die making process, those are almost certainly "real" dies that are either dead or disabled, as it would be quite expensive to make spacers rather than use failed dies.

Amd said no transistors

[S w a t s o n]

Just now, DocSwag said:

They had no transistors, who said they even need the wafers?

Amd said no transistors

Actually if you read the quote they dont say "no transistors" they say "no working transistors". The words they chose to use are very clever but do not explicitly deny a disabled Zeppelin die scenario.

[Jito463]

3 minutes ago, DocSwag said:

They had no transistors, who said they even need the wafers?

Amd said no transistors

Technically, they said no "working" transistors.  I was going to post something similar to what you posted, then I went back and re-read it.  I'm not sure if that distinction actually means anything, just wanted to clarify.

3 hours ago, DiaSin said:

These two extra dies are not active or even contain working transistors, they are blank and as such are not "wasted Ryzen CPU dies".

*EDIT*
D'OH!  Ninja'd! 

[ravenshrike]

17 minutes ago, Swatson said:

Actually if you read the quote they dont say "no transistors" they say "no working transistors". The words they chose to use are very clever but do not explicitly deny a disabled Zeppelin die scenario.

So they take the dead/really shitty CCXs(Figure between 2-5% of the total CCXs produced) coming off their line and fry them completely without adding all the bells and whistles. Thsi not only saves the effort of creating true blanks but reduces the amount of electronic waste they have to get rid of as well. The HEDT market is small compared to the server/mainstream markets. It's highly unlikely they're gonna run out of dead spares for the HEDT IHS's.

[S w a t s o n]

2 minutes ago, ravenshrike said:

So they take the dead/really shitty CCXs(Figure between 2-5% of the total CCXs produced) coming off their line and fry them completely without adding all the bells and whistles. Thsi not only saves the effort of creating true blanks but reduces the amount of electronic waste they have to get rid of as well. The HEDT market is small compared to the server/mainstream markets. It's highly unlikely they're gonna run out of dead spares for the HEDT IHS's.

One nitpick, they take Zeppelin dies, not CCXs. They do not produce a 1 CCX die ATM.

[DXMember]

3 hours ago, Lord Nicoll said:

Those dies cost money, the wafers they're cut from are not cheap, the indium soldering process is also expensive, indium only wets to gold, gold won't wet to silicon either, you have to vapour deposit I think it's vanadium oxide then titanium and then gold to get the indium to stick to the silicon die, and the IHS needs a gold plating, and indium isn't cheap either, that is a lot of expense for two dummy dies, I'm not totally convinced. 

someone did the math and it came to $1.80 for soldering all four dies on Threadripper, blank silicon dies with no transistors if probly cheap AF as well, the it's etching on the wafers that cost a lot (and only because of the R&D investment, when the factory is set up and running full production mode the expenses are minimal), no the wafers themselves

[S w a t s o n]

9 minutes ago, DXMember said:

someone did the math and it came to $1.80 for soldering all four dies on Threadripper, blank silicon dies with no transistors if probly cheap AF as well, the it's etching on the wafers that cost a lot (and only because of the R&D investment, when the factory is set up and running full production mode the expenses are minimal), no the wafers themselves

Mounting a die to to the substrate requires a prepared die with the microbumps, the silicon is actually not that cheap either. They could do it without going bankrupt but it's an unnecessary cost.

[DXMember]

2 minutes ago, Swatson said:

Mounting a die to to the substrate requires a prepared die with the microbumps, the silicon is actually not that cheap either. They could do it without going bankrupt but it's an unnecessary cost.

it's not like they do that by hand... pretty sure they use the same process for EPYC already and robots are pretty cool and will do anything for free, those poor little jigawatt addicts

[S w a t s o n]

17 minutes ago, DXMember said:

it's not like they do that by hand... pretty sure they use the same process for EPYC already and robots are pretty cool and will do anything for free, those poor little jigawatt addicts

They use the same process for all CPUs. It's how flip chip designs work in general

[Mr.Meerkat]

1 hour ago, leadeater said:

TSMC?

Was about to say...AMD TSMC? Whhhhaaaaaaa? He surely meant gloflo