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TSMC to begin building 3nm Factory

williamcll
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19.5$ billion is going to be invested into a new 30 hectare building to produce the next-next generation of chips

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TSMC reportedly has started construction of its 3nm fab that is expected to begin production in 2023. The Taiwan-based contract chipmaker has acquired 30 hectares of land for the facility.

The land is located in the Southern Taiwan Science and Technology Park,where TSMC already employs over 10,000 people, but there aren’t many other details. The location is in line with TSMC's disclosure in 2017 and is the same area set aside for 5nm production. During the fab’s initial announcement in 2016, it was reported that TSMC would need 50 to 80 hectares of land and would launch in 2022.

With the news last year that TMSC had been cleared to begin production, the cost was estimated at $19.5 billion and production slated to start in late 2022 or early 2023. Earlier this year, C.C. Wei, CEO of TSMC, said that 3nm development was “going well” and that it was engaging with early customers on the technology definition.

TSMC is currently working on getting its 5nm process node into volume production in the first half of 2020. In early 2018, TSMC broke ground on its Fab 18 for 5nm production. Fab 18 has a size of 42 hectares, 160,000 square meters of cleanroom area, and will have a capacity of over one million wafers per month when all three phases are completed in 2021, providing work for 4,000 people.

The reported 2023 schedule for 3nm volume production would be noteworthy as TSMC has opted for at most a two-year cadence for all of its nodes since 20nm in late 2014. In general, TSMC has opted for shrinks of at most 2x density scaling with a more steady cadence, while Intel introduced the term hyperscaling at 10nm to describe its ambitious 2.7x scaling on 10nm and 2.5x on 14nm.

On Thursday, Intel said that it aimed to go back to a two-year cadence for at least the next few nodes, with 7nm scheduled for release in the fourth quarter of 2021 with a data center GP-GPU with Foveros 3D packaging. This could indicate that Intel’s 5nm and TSMC’s 3nm nodes will go toe-to-toe in 2023. While no details about either process are known yet, Intel claimed it’s “working to recapture process leadership.” 

Samsung plans to begin its own 3nm production in 2021, based on gate-all-around (GAA) technology, although its density will not be as high as TSMC’s 3nm. (For Samsung, 5nm is an optimization of its 7nm node.)

Source:https://www.digitimes.com.tw/tech/dt/n/shwnws.asp?cnlid=1&id=0000571412_EEM3AE722NKDUO1R4XNB7

https://www.digitimes.com/news/a20191024PD202.html

https://www.tomshardware.com/news/tsmc-fab-3nm-5nm-process-intel-samsung

Thoughts: Lmaoing at Intel 10++ right now while every other manufacturers (Even SMIC) would have passed them at this point.

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3 minutes ago, williamcll said:

https-s3-ap-northeast-1.amazonaws.com-ps

19.5$ billion is going to be invested into a new 30 hectare building to produce the next-next generation of chips

Source:https://www.digitimes.com.tw/tech/dt/n/shwnws.asp?cnlid=1&id=0000571412_EEM3AE722NKDUO1R4XNB7

https://www.digitimes.com/news/a20191024PD202.html

https://www.tomshardware.com/news/tsmc-fab-3nm-5nm-process-intel-samsung

Thoughts: Lmaoing at Intel 10++ right now while every other manufacturers (Even SMIC) would have passed them at this point.

Talk is cheap this is just specs if you will.  Actual 3nm chips wont happen any year now so don't hold your breath ya know.

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2 minutes ago, Turtle Rig said:

Talk is cheap this is just specs if you will.  Actual 3nm chips wont happen any year now so don't hold your breath ya know.

They did say it's a 2023 release.

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5 minutes ago, williamcll said:

They did say it's a 2023 release.

Hmmmmmm. 2023 release but not built yet.  The fab will be available now you gotta build chips with the new process that will make it minimum 2025 is what I say.

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10 minutes ago, williamcll said:

They did say it's a 2023 release.

HUGE doubt.

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@williamcll You laugh, but you don't even realize that it's not the same as Intels sizing, just like AMDs chips aren't the same as Intels when it comes to nm size...

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It makes me curious where would we go next after 3nm. I've read 2.5nm and 1.5nm, but what after that? I know that's gonna be decades in the future but, it still makes me wonder. We'll burn that bridge when we get there.

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1 hour ago, williamcll said:

 

Thoughts: Lmaoing at Intel 10++ right now while every other manufacturers (Even SMIC) would have passed them at this point.

 

If you could directly compare scales between manufacturers you might be able to make that claim, however you can't and the evidence is in the fact that Intel's 14+++++++nm is trading blows with AMD's 7nm. 

Grammar and spelling is not indicative of intelligence/knowledge.  Not having the same opinion does not always mean lack of understanding.  

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2 minutes ago, thorhammerz said:

Wydm, clearly less nm equals more faster, or so the marketing bibles say ?.

The marketing bible and the empty fan boy rhetoric on forums.

 

Grammar and spelling is not indicative of intelligence/knowledge.  Not having the same opinion does not always mean lack of understanding.  

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1 hour ago, Froody129 said:

So how do we know if it's "real" 3nm. There's some confusion since the manufacturers seem to be define the size differently. 

At least it should be smaller than their own 7nm and 5nm nodes.

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2 hours ago, Okjoek said:

What material?

Unobtainium probably 

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The shrink is real. Next decade will be exciting that's for sure. 

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there will probably be delays, lets be honest, but at least they have some kind of path layed before them, and judging by their 6nm/7nm+ developments, they have EUV figured out to some degree. 

its probably going to be an efficiency node for the most part, less of a performance node. which isnt a bad thing per say. 

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9 hours ago, dizmo said:

@williamcll You laugh, but you don't even realize that it's not the same as Intels sizing, just like AMDs chips aren't the same as Intels when it comes to nm size...

7nm tsmc is around the same ballpark as intel's aims for 10nm, except we know 10nm was changed a whole lot to allow for acceptable yields, tsmc is now the silicon king if intel is able to launch 7nm on time they might be able to reach parity, but they no longer have a large advantage

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7 hours ago, MichaelWd said:

What's the benefit of smaller size? Are they faster? 

Less power draw for a given level of performance, and increased density meaning either more transistors at a given die size (meaning more cores and potentially instruction sets on CPU, or more compute units on GPU), or the same number of transistors for a smaller die (aka cheaper).

 

I believe that theoretically a smaller die should make higher clock speeds easier to achieve, but in practice a newer process will generally need to go through a lot of optimization to reach the clock speeds of a well established larger process. There's also the concern of heat transfer; cramming more transistors into a smaller space can make it much more difficult to extract the heat. 

 

Tl;dr: Basically faster and/or more efficient. 

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