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[WCCFtech] AMD’s Vega 10 Based Dual GPU Graphics Card Inbound – Expected Single Precision Compute Performance To Be Greater Than 18 TFLOPs

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It looks like the hardware leak season is in full swing because a report by Fudzilla reveals that AMD is working on a dual chip Vega 10 graphics card for the professional market. This comes a few weeks after Videocardz confirmed the existence of the same – so you know have two independent confirmations for dual GPU Vega 10. This is something that isn’t really all that surprising and probably fairly expected in terms of lineup progression but still goes on to show that AMD will be leveraging its arsenal of GPUs to their full potential to maximize its return on investment.

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Vega 10 Dual GPU expected to land in Q2 2017 – targeted at the professional market

Not much details are known about the Vega 10 based dual GPU at this point but since AMD has always included full dies in any dual GPU configuration we can simply multiply the known configuration of Vega10 by 2. It’s really as simple as that.
Since Vega 10 has 64 compute units, the dual GPU will have 128 CUs for a total of 8192 stream processors(assuming the SP to CU ratio remains the same in Vega architecture as Polaris). You are also looking at a total of 32 GB of HBM2 on the board with an aggregate bandwidth of 1 TB/s (512 GB/s x2). The TBP (Total Board Power) is expected to be around 300W so we can expect it to be clocked lower than its single GPU siblings.

The Vega 10 GPU has roughly 24 TeraFLOPs of 16-bit compute. 16 bit compute is, of course, half-precision work and since Vega has native 16-bit compute support, we can find out the single precision performance by simply cutting the number in half: which gives us exactly12 TeraFLOPs of single precision compute. The required clock rates for this amount of performance can also be easily derived using the function [Stream Processors * Clock Rate * 2 Instructions per Clock] which are somewhere in the vicinity of 1465 Mhz.

AMD-Vega-10-Featured-840x473.jpg

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Naturally, a dual chip solution is never clocked as high as the single chip solution so assuming clock rates of 1100 Mhz to 1200 Mhz you are looking at en effective computational power of 18 TeraFLOPs to 19.6 TeraFLOPs easily – and that’s single precision figures. If Nvidia does not respond with a dual GPU solution as well (and dual GPUs aren’t usually their style in the professional market) then this graphics card will easily be able to give competition to Nvidia’s P100 and GP102 based offerings.

 

Both sources have indicated a time span of Q2 2017 for the arrival of this monster but it is very much possible that we are going to be seeing a demo of the same by the end of the year; around the same time the single chip based version would start shipping. We have also previously posted about all of AMD’s upcoming offerings which include the 7nm based Vega 20 GPU as well as the Navi series. The process node for this particular graphics card will be the 14nm FinFET process from GlobalFoundries/Samsung.

 source: http://wccftech.com/vega-10-dual-gpu-graphics-card/

 

next year is certainly going to be exciting if rumors are to be belived , between zen , pascal and now vega. Hope this isn't baseless.

 

and as always , remember one thing : 

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If the 490 is a dual GPU, I'm just going to get the 480 instead. I'm not going to be a guinea pig for mGPU

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Just now, ivan134 said:

If the 490 is a dual GPU, I'm just going to get the 480 instead. I'm not going to be a guinea pig for mGPU

if the 490 turns out to be dual polaris 10  , we'll likely see SKU's above based on vega 10 and 11 using names like fury or rage. X90 series isn't AMD high end naming scheme anymore ...

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1 minute ago, Coaxialgamer said:

if the 490 turns out to be dual polaris 10  , we'll likely see SKU's above based on vega 10 and 11 using names like fury or rage. X90 series isn't AMD high end naming scheme anymore ...

And those will have prices I don't want to pay. Around the 1070s price is my max

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1 minute ago, ivan134 said:

And those will have prices I don't want to pay. Around the 1070s price is my max

maybe . we don't know for now anyway . I just hope there won't be any price gouging like what's happening with the 1080....

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19 minutes ago, Coaxialgamer said:

You are also looking at a total of 32 GB of HBM2

Good thing that it is targeting the professional market because that much hbm2 on a dual gpu card seems (to me) just to much for any regular consumer or hardcore gamer who just games and will most likely be way to expensive for what it is worth

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Just now, malon said:

Good thing that it is targeting the professional market because that much hbm2 on a dual gpu card seems (to me) just to much for any regular consumer or hardcore gamer who just games and will most likely be way to expensive for what it is worth

there a fairly high chance well get a professional-only like gp100 in the vega lineup

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It kind of seem like AMD wants dual-GPU cards to be common and they are trying to push us into that direction.

I don't read the reply to my posts anymore so don't bother.

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Yeah that's a monster of a dual GPU card. Can't wait to see demo, also interested to see how it looks physically without cooler and all that HBM2 :D
Excited to see that single chip 12TeraFLOPs is very appealing.

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Just now, Doobeedoo said:

Yeah that's a monster of a dual GPU card. Can't wait to see demo, also interested to see how it looks physically without cooler and all that HBM2 :D
Excited to see that single chip 12TeraFLOPs is very appealing.

i would still apply a massive pile of salt to this article . I even hesitated about posting it because of how unreliable WCCF can be.

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49 minutes ago, ApolloFury said:

It kind of seem like AMD wants dual-GPU cards to be common and they are trying to push us into that direction.

Well I have absolutely no problems with that...as long as it's decently power efficient with the software up to notch to get rid of things like micro-stuttering or it not being supported by all games :P 

 

I'm no developer but can it really be that hard to just emulate dual GPUs as a single die? Considering that you can increase core counts on a GPU which directly results in higher performance, I don't see why they can't just emulate it so games utilises GPUs fully...

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2 minutes ago, Mr.Meerkat said:

Well I have absolutely no problems with that...as long as it's decently power efficient with the software up to notch to get rid of things like micro-stuttering or it not being supported by all games :P 

 

I'm no developer but can it really be that hard to just emulate dual GPUs as a single die? Considering that you can increase core counts on a GPU which directly results in higher performance, I don't see why they can't just emulate it so games utilises GPUs fully...

well it's a bit more complicated than that :D ( it always is unfortunately )

 

Problem is each gpu have their own cache structure , registers , ALU's ,etc . And while data can transfer pretty much instantly across a die , making a dual gpu card requires both chips to "package" the data and send it over a slow and high-latency bus like pcie ( still applies to things like QPI , DMI and hypertransport  )

 

even if you could trick software to view both chips as one thread and solve pacing issues , you'd still be seeing massive inefficiencies due to this bus alone + "bubbles" where chips stand waiting for data to process .

 

Plus , adding more cores isn't always the solution , even in GPU's .  

AMD had an architecture called VLIW before they introduced GCN ( which is SIMD-style ) , the idea is to have many weak cores and add more when needed . as long as the task can be parallelised , it works very well. Graphics workloads can be split very easily , which is why they work well for VLIW , however compute cannot always be split across many core . VLIW's weak core approach is therefor not suited to compute as single core perf is poor.  Todays games , as well as many apps , rely heavily on compuite for effects , physics etc .

Plus , a big problem with it , as AMD found out , is that cores often fail to be fully utilized , which makes the problem worse. 

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1 minute ago, Coaxialgamer said:

even if you could trick software to view both chips as one thread and solve pacing issues , you'd still be seeing massive inefficiencies due to this bus alone + "bubbles" where chips stand waiting for data to process .

PCIe 4.0 and new dual GPU bridge that can actually handle a good amount of data?

 

I know it's not as simple as that and what ever but if it was possible then...it would be good for everyone :P 

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1 hour ago, VerticalDiscussions said:

Bruh, Titan Z Pascal incoming....

no i want the 295x4

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32 minutes ago, Coaxialgamer said:

i would still apply a massive pile of salt to this article . I even hesitated about posting it because of how unreliable WCCF can be.

Right :) Though 12TFLOPS doesn't seem off to me.

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1 hour ago, ivan134 said:

If the 490 is a dual GPU, I'm just going to get the 480 instead. I'm not going to be a guinea pig for mGPU

Wait for the 485 Vega replacement.

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1 hour ago, Coaxialgamer said:

if the 490 turns out to be dual polaris 10  , we'll likely see SKU's above based on vega 10 and 11 using names like fury or rage. X90 series isn't AMD high end naming scheme anymore ...

But why Rage? It's a very old naming scheme, I doubt that they're gonna go back to that.

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It does say professional use... other compute uses can scale more easily than gaming graphics. Maybe best not to look at this as a gaming card.

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Just now, Mr.Meerkat said:

PCIe 4.0 and new dual GPU bridge that can actually handle a good amount of data?

 

I know it's not as simple as that and what ever but if it was possible then...it would be good for everyone :P 

even then , you're only effectively running at 2GB/s per lane ( 32GB/s total in a 16x slot ) . that's astronomically slow for this kind of approach . In a chip , you're only limited by how fast the electricity can flow through the wires. With something like pcie or a bridge , you're still dealing with massive amounts of slowdown primarily because you have to deal with protocols . 

 

Plus their is latency to consider . Let's imagine their is a 1µs latency on pcie ( just pulling numbers out of my hat here , i don't know the actual figures ) . On a gpu that runs at 1ghz , that's 1000 cycles you just wasted , PER TRANSFER .

 

It theory , it would be possible for companies to design  small gpu "parts" that don't function independently and create one big chip with them by connecting the wires . It would allow for much higher yields due to the fact smaller chips yield exponentially better . In fact , this scalability  is what AMD is aming for with navi , and what might keep moore's law going ( thinking of 3D IC's ) . But nothing like you mentionned.

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8 minutes ago, Morgan MLGman said:

But why Rage? It's a very old naming scheme, I doubt that they're gonna go back to that.

i don't know , just speculation . It could be anything really

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It beat a 1080 in AOTS. AMD optimized game with DX12 but the wonders Vulkan could bring.

ƆԀ S₱▓Ɇ▓cs: i7 6ʇɥפᴉƎ00K (4.4ghz), Asus DeLuxe X99A II, GT҉X҉1҉0҉8҉0 Zotac Amp ExTrꍟꎭe),Si6F4Gb D???????r PlatinUm, EVGA G2 Sǝʌǝᘉ5ᙣᙍᖇᓎᙎᗅᖶt, Phanteks Enthoo Primo, 3TB WD Black, 500gb 850 Evo, H100iGeeTeeX, Windows 10, K70 R̸̢̡̭͍͕̱̭̟̩̀̀̃́̃͒̈́̈́͑̑́̆͘͜ͅG̶̦̬͊́B̸͈̝̖͗̈́, G502, HyperX Cloud 2s, Asus MX34. פN∩SW∀S 960 EVO

Just keeping this here as a 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19 minutes ago, Mr.Meerkat said:

PCIe 4.0 and new dual GPU bridge that can actually handle a good amount of data?

 

I know it's not as simple as that and what ever but if it was possible then...it would be good for everyone :P 

the problem is the latency of the connection not much the speed/bandwith. we would need a way for cache to be shared, that would help some what

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27 minutes ago, Coaxialgamer said:

even then , you're only effectively running at 2GB/s per lane ( 32GB/s total in a 16x slot ) . that's astronomically slow for this kind of approach . In a chip , you're only limited by how fast the electricity can flow through the wires. With something like pcie or a bridge , you're still dealing with massive amounts of slowdown primarily because you have to deal with protocols . 

 

Plus their is latency to consider . Let's imagine their is a 1µs latency on pcie ( just pulling numbers out of my hat here , i don't know the actual figures ) . On a gpu that runs at 1ghz , that's 1000 cycles you just wasted , PER TRANSFER .

 

It theory , it would be possible for companies to design  small gpu "parts" that don't function independently and create one big chip with them by connecting the wires . It would allow for much higher yields due to the fact smaller chips yield exponentially better . In fact , this scalability  is what AMD is aming for with navi , and what might keep moore's law going ( thinking of 3D IC's ) . But nothing like you mentionned.

To clarify, the limit within a hip is not the speed of the flow of electricity. If it was we'd still be stuck in kilohertz. Electricity flow in solid matter is very slow. The limit for ICs is electrical signaling, or a way to make the entire chain of electrons shake. The signal wave "vibrates" over the electrons, flying much faster than they can.

Software Engineer for Suncorp (Australia), Computer Tech Enthusiast, Miami University Graduate, Nerd

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