AMD Zeppelin Processor with 32 x86 Zen Cores Spotted in Linux Changelog

[Mr_Troll]

AMD Zeppelin Processor with 32 x86 Zen Cores Spotted in Linux Changelog – EHP Variant Will Have Vega 10 Graphics with HBM2

 

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A Zeppelin is a type of a rigid body airship which is filled with a lighter-than-air gas. They were very popular in the early 1900s and a popular mode of transport. Unfortunately, the use of cheaply available hydrogen as the primary gas caused several accidents (most notably Hindenburg) over the course of the next few decades which caused them to be abandoned. Modern variants of the Zeppelin use Helium as the primary gas, which is just as light but not combustible.

Coming back to the actual topic at hand, the report in question quotes several lines of code published in a recent update bt AMD which can be found over at LKML .com:

 

 

 

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AMD Zeppelin (Family 17h, Model 00h) introduces an instructions retired performance counter which indicated by CPUID.8000_0008H:EBX[1]. And dedicated Instructions Retired register (MSR 0xC000_000E9) increments on once for every instruction retired.

Signed-off-by: Huang Rui <ray.huang@amd.com>
—
arch/x86/include/asm/cpufeature.h   | 1 +
arch/x86/include/asm/msr-index.h     | 3 +++
arch/x86/kernel/cpu/perf_event_msr.c | 30 +++++++++++++++++++———–
3 files changed, 23 insertions(+), 11 deletions(-)

+ core_complex_id = (apicid & ((1 << c->x86_coreid_bits) – 1)) >> 3;
+ per_cpu(cpu_llc_id, cpu) = (socket_id << 3) | core_complex_id;

 

 

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The code is conveniently signed by an AMD engineer and confirms the name of the processor. An AMD research paper in the past has also referred to a very similar (if not the same) chip as an EHP or Exascale Heterogeneous Processor along with a diagram of the same. Which is basically an APU with the Zeppelin module included. The code present in this update also points to the expected 4 Zen core clusters and a total of 32 maximum CPUs which will be divided into core complexes consisting of 4 Zen cores each (8 logical cores thanks to SMT). Given below is a recap of what leaks have pointed out so far:

 

http://cdn.wccftech.com/wp-content/uploads/2016/02/AMD-Zeppelin-EHP-Processor.jpg

 

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AMD is currently working on a Multi Chip Module that is code named Zeppelin. It is thought to contain 32 Zen cores tied together using AMD’s very own Coherent Fabric. The homegrown interconnect will support data rates of upto 100GB/s which is alot faster than what the PCIe interface sustains (around 15GB/s). Not only that but latency has been reduced from 500ns to an unknown but allegedly smaller number. It remains to be seen whether Zeppelin refers only to the Zen processors cluster or the MCM as a whole. The original leak by Fudzilla showed Vega 10 (previously Greenland) graphics connected by Coherent Data Fabric. High Bandwidth Memory (probably on a 2.5D interposer) was also included and clocked at 500 GB/s.

 

The Zeppelin and Vega 10 based MCM will feature 4 GMIs or Global Memory Interconnects (which constitute the Coherent Data Fabric I suppose) allowing the CPU to converse with the GPU at 100GB/s. The MCM itself will talk to the RAM at 100 GB/s as well – allowing for a very HSA friendly environment and minimum bottleneck throughout the whole process. Each Zen core will be capable of running two threads (thanks to the company’s shift to Simultaneous Multi-Threading). The processor is thought to have 4 DDR4 channels with a capacity of 256GB per channel.

 

What we do know for sure (thanks to a published research paper by AMD) is that the Zeppelin EHP variant will utilize the next generation Vega 10 graphics, although the exact core count remains unknown. The diagram published by AMD points towards the MCM divided into two compute and one graphic portions, which are manufactured separately and put together on the interposer later on in assembly (possibly at UMC’s Fab 12 foundry in Singapore, which is already used to assemble Fiji dies). So basically, AMD is fabricating the compute side of the Scale Heterogeneous Processor (EHP) in dies with 16 Zen cores each (4 core complexes), for a total of 2 computing and 1 graphics die assembled on the interposer (ignoring the HBM.

 

 

32 cores and hbm2 graphics? Looks like a powerhouse to me.

 

Source:https://lkml.org/lkml/2016/1/6/875

http://dresdenboy.blogspot.de/2016/02/amd-zeppelin-cpu-codename-confirmed-by.html

 

 

[Infernal Burrito]

I'd be incredibly surprised if this was not server or high end workstation hardware. Jumping from 8 to 32 cores would not help really any general user or gamer in practice.

[Chasem121]

2016 seems like its going to a big year for cpus and gpus

[QueenDemetria]

Cool.

[connorpiper]

The disaster of Hindenburg was not caused by the hydrogen gas, rather it fueled the incident. 

 

Anyways, that is a pretty cool name for a CPU. 

[patrickjp93]

22 minutes ago, Mr_Troll said:

AMD Zeppelin Processor with 32 x86 Zen Cores Spotted in Linux Changelog – EHP Variant Will Have Vega 10 Graphics with HBM2

 

 

 

 

http://cdn.wccftech.com/wp-content/uploads/2016/02/AMD-Zeppelin-EHP-Processor.jpg

 

 

32 cores and hbm2 graphics? Looks like a powerhouse to me.

 

Source:https://lkml.org/lkml/2016/1/6/875

http://dresdenboy.blogspot.de/2016/02/amd-zeppelin-cpu-codename-confirmed-by.html

 

 

The 32-core chip will not have graphics attached. The last diagram we saw with a 2048-SP iGPU and HBM2 attached only had 16 cores. You'd be looking at 850mm sq. dies or larger to have 32 cores fit with the rest of it, and that's before the interposer too.

[Ridska]

AMD FTW !

 

[MrDynamicMan]

Thats neat, but I doubt we'll see this in anything other than linus's glorified nas.

[Guest]

It would be nice if Zen featured HSA with 8 cores and iGPU then.

But then again we (I) dont even know how zen works...

[mr.squishy]

This sounds like a total beast. But, as we all know, should be taken with a grain of salt, as these are only paper specs. Can't wait to see what AMD has planned for their cpu division.

[Sakkura]

1 hour ago, valdyrgramr said:

So, is this like an Opteron replacement or?

 

It's a Teraflopteron.

[That Norwegian Guy]

Four physical chips in one package? INB4 it gets the 'bigfoot' nickname.

 

If the package is as big as it sounds, I want to see aftermarket coolers with 36 heatpipes!

[AlTech]

50 minutes ago, That Norwegian Guy said:

Four physical chips in one package? INB4 it gets the 'bigfoot' nickname.

 

If the package is as big as it sounds, I want to see aftermarket coolers with 36 heatpipes!

So 8 cores per package? Why that terrible density? That's truly awful density.

[PlayStation 2]

4 hours ago, MrDynamicMan said:

Thats neat, but I doubt we'll see this in anything other than linus's glorified nas.

That's even if before Intel bribes him with two more of those 20 core Xeons.

[Prysin]

5 hours ago, patrickjp93 said:

The 32-core chip will not have graphics attached. The last diagram we saw with a 2048-SP iGPU and HBM2 attached only had 16 cores. You'd be looking at 850mm sq. dies or larger to have 32 cores fit with the rest of it, and that's before the interposer too.

 

Wasnt it at some point confirmed, or rumored that AMD would on the server side move towards mass logical cores, similar to IBM Power8/Power9 does, for each physical core?
if so, 32 "cores" could be anywhere between 4-8physical cores. In which you need a helluva lot less space.Also if memory serves me right, GCN has "main core clusters", in which the SPs and ACEs sit in a specific configuration.Given that they are talking about Heterogenous systems architecture, one can assume that they mean 32 compute units, 4 CPU are confirmed through the documents "leaked". The rest is being wrongly read as cores.Any software supporting OpenGL2.1 or later will be able to recognize AMDs HSA 1.0 cores as actual cores. It is then up to the software designer to choose to capitalize on this and enable ACEs to be used for general compute, or if to treat the CPU and GPU cores separatly.could simply be software reading this zeppelin thing wrong.

 

 

 

 

 

 

 

 

 

[CTR640]

IPC is much more important than amount of cores.

Even if you have 128 cores, it won't help shit.

 

 

[Prysin]

2 hours ago, CTR640 said:

IPC is much more important than amount of cores.

Even if you have 128 cores, it won't help shit.

 

 

lol, if you think IPC is THAT important, you got a lot to learn then.

[MrDynamicMan]

4 hours ago, Dan Castellaneta said:

That's even if before Intel bribes him with two more of those 20 core Xeons.

"Oh noes, I can't decide between these $10000 Processors, what will I do?"

 

#firstworldproblems

[Doobeedoo]

Looks quite interesting on paper and seems to be a beast!
Though what I'm mainly interested is on consumer side, specially about 8-core they'll have. For my future build I require more cores and I also hope for that serious IPC increase to. If both of that can be delivered together, with a solid price - insta-buy.

[Khvarrioiren]

3 hours ago, CTR640 said:

IPC is much more important than amount of cores.

Even if you have 128 cores, it won't help shit.

 

 

 

Better go and inform every single server maintainer that they should be using 5960x's and not Xeons then. I mean, you apparently ARE an expert in this subject.

[patrickjp93]

29 minutes ago, Khvarrioiren said:

 

Better go and inform every single server maintainer that they should be using 5960x's and not Xeons then. I mean, you apparently ARE an expert in this subject.

facepalm*

 

There is no IPC difference between the two in the same generation.

[patrickjp93]

1 hour ago, Prysin said:

lol, if you think IPC is THAT important, you got a lot to learn then.

Without IPC you don't get performance scaling so...

[Prysin]

Just now, patrickjp93 said:

Without IPC you don't get performance scaling so...

scaling is one thing, but IPC can be offset by clock speed and a few other factors.

 

 

[The_Stig]

1 hour ago, MrDynamicMan said:

"Oh noes, I can't decide between these $10000 Processors, what will I do?"

 

#firstworldproblems

More like #justlinusproblems

[Khvarrioiren]

1 hour ago, patrickjp93 said:

facepalm*

 

There is no IPC difference between the two in the same generation.

 

That was about core count amounting to "won't help shit".

 

Facepalm yourself somewhere else.