Benchmarks of the Skylake i7 6700K have emerged... Only marginally faster than 4790K...

[spyder]

Intel is doing these small minor improvements because they know AMD hasn't got anything to currently compete with. It feels like they are investing less and less into the CPU improvement, COME ON AMD!

[patrickjp93]

If you honestly think that, i don't even know what to say. Intel's really not doing any work, seeing as AMD isn't any competition at all. And not to mention that the argument about past support is completely irrelevant. Microsoft doesn't need to build support in for a pentium 4, it's in there naturally...seeing as CPUs are still the same, just stronger/with more cores. It also has nothing to do with instruction sets, seeing as they are all included...Didn't you ever wonder why windows was 60GB? it's not all those neat UI elements, that's for sure

Really? Because I have news for you. The exact same cores go into an E7 Xeon as go into a Core M chip. Intel is fighting against both IBM Power and Oracle Sparc, both very powerful architectures that take up roost in the most lucrative area of business and high performance computing: scale-up workloads. Everything Intel does to fight them is implemented in the lower power chips for testing grounds and improving the thermoelectric properties of its architecture and manufacturing process. Every innovation Intel comes up with in HPC applies to mobile and desktop on the hardware side. Now, bear in mind 95% of the software you use doesn't use any instruction newer than that available on the Pentium III. This is a guarantee caused by legacy support in the name of getting as many customers as possible. That means your software falls into the category SISD, or Single-Instruction, Single-Data programming, where each instruction moves or manipulates exactly 1 piece of data at a time. Now, as one who studies computer science across the spectrum of theory and application at the highest and lowest levels, I've news for you: SISD computing is grinding against its theoretical limits before every performance gain is tied to clock rates per core.

 

Don't believe me? No instruction can execute faster than a single cycle. That's not a limit which can be escaped. Beyond that, all the algorithms implemented in hardware to make those instructions do what they do fall into various time complexities in the polynomial time hierarchy you'd learn about in an algorithms course. Read page 186 down of the following: http://www.agner.org/optimize/instruction_tables.pdf Those are the instruction-cycle latencies for all x86 instructions for all architectures across VIA, AMD, and Intel up through Haswell. Notice the number of cycles used for all the arithmetic instructions such as add/sub/mul/div. In integer they've all been reduced to 1-3 cycles, and anything larger than 1 can't be shrunk down anymore. There are mathematical proofs of this, but they're beyond you most likely. Algorithm Design by Kleinberg and Tardos has them if you're interested. That means Intel has done all it can to help those instructions execute any faster. Intel already has the best branch predictor which is estimated at 98% accuracy in Haswell. It also has the deepest pipeline of any existing CPU product, meaning the CPU is folding more instructions together in out of order processing to maximize throughput. The gains left to be had on SISD computing are the very last bits of residue stuck to the bottom of the barrel. The low hanging fruit has all been picked. 

 

It is up to software to then move to SIMD and stop trying to support the dinosaurs. Intel first brought out the 64-bit version of SIMD in MMX. Manipulate 2 32-bit data items at once or 4 16-bit or 8 8-bit. We're up to 256 now, or 8 32-bit data items, 16x16, and 32x8. Believe it or not, you don't have to be doing matrix multiplications or scientific computing to use and benefit from these instruction sets like AVX 256. You just have to build your code intelligently, in implicitly parallel form. It's not very difficult to do this. Any university with a computer science program worth a damn will have a high performance computing class that'll teach you the basics. Beyond this, you need a compiler which is good at optimizing the instructions used to implement the code you wrote. Here's the other big issue. Microsoft's Visual C/C++ compiler is the worst at optimization among the big 4: MSVC, GCC, Clang, and ICC. GCC and Clang are open-source and smack the living daylights out of MSVC in compile time, memory usage both during the compilation process and in the final executable runtime, and efficiency of running time. Intel beats both of them by a fair margin more, but the fact remains Intel has done the work to make computing better for everyone. The software developers have not utilized Intel's work. That's their fault.

 

Guess who also pushed multithreaded design first? It wasn't AMD by a long shot. Intel created OpenMP to help people build dynamically scaling multithreaded code back in 2000. The HPC crowd picked it right up to build the prototypes of systems before going back and hand-optimizing the threading for every last single cycle. Consumer space did nothing with it despite the fact it became an open standard in 2005-2006 and is so easy it's literally just markup language for existing C/C++ code. OpenMP adds about 1-2% overhead at the most to let you very easily build dynamically scalable multithreaded code to extra multicore performance out of existing software. Just about any university with an HPC class will spend a fair chunk of the semester using it. Intel pushed parallel computing before multicore processors were available to consumers. Where is the multithreaded software now? Games have 1 thread doing most of the work while the other 3/5/7 are on smoke break. Clearly not built for balance and scaling. Yet you want more cores and more performance from the company that both builds the best hardware in the world avilable to you, the programming standards to make software development to maximize performance easy, and the best compiler in the world at optimizing code when a 2600K isn't even halfway done yet. 

 

So, this is why I say Intel has done all the work: Intel HAS done ALL the work. Idiocy and greed individually are troublesome enough. Together, they're just outright ugly.

 

And no, you're wrong about support. Microsoft CONSTRAINS the instruction sets used to build the operating system to only the oldest. Ever wonder what happens if you give a new Opcode (the binary representing assembly instructions which your CPU actually understands) to an old CPU? Your whole system crashes. Solution? Don't allow newer Opcodes. There is a better solution: an instruction dispatcher and multiple code paths to let you take the best path available for your CPU. The downside is every additional code path will roughly increase the size of the executable by a factor of the original size. Now, Windows is terribly wasteful coming in at more than double the size of Ubuntu or Fedora. Imagine 120GB or 240 just to host the OS and ensure you not only get the best performance, but that the OS can serve every CPU optimally from the Pentium III/IV all the way up to the 6700K. You'd have more than 1TB just in OS.

 

So don't try to lecture the actual expert on the matter. Shut your trap, and learn something. Intel has redoubled its processing power every 2 years. You just don't have the software to make use of that power. Why even bother with AVX 512 for the mainstream and increase core sizes unnecessarily when you're not even using SSE 3/4, AVX 128, or AVX 256? If you want to pick a fight over your lackluster performance gains, go aim a cannon at Microsoft or the software studios of your choice.

[patrickjp93]

Intel is doing these small minor improvements because they know AMD hasn't got anything to currently compete with. It feels like they are investing less and less into the CPU improvement, COME ON AMD!

see my reply above. Your view of the issue is completely misguided. Intel is doing all the work and fighting tooth and nail against both IBM and Oracle, and every innovation it uses to make the Xeon E5/E7 cores better is also put down in desktop and mobile chips. The CPU cores do not change from tier to tier other than a couple virtualization instructions and more advanced security processors demanded by high performance computing environments. Software has stagnated and hardware is leagues ahead. Intel is the last company anyone should be blaming for slow progress on performance improvements.

[Norman_the_Owl]

Really? Because I have news for you. The exact same cores go into an E7 Xeon as go into a Core M chip. Intel is fighting against both IBM Power and Oracle Sparc, both very powerful architectures that take up roost in the most lucrative area of business and high performance computing: scale-up workloads. Everything Intel does to fight them is implemented in the lower power chips for testing grounds and improving the thermoelectric properties of its architecture and manufacturing process. Every innovation Intel comes up with in HPC applies to mobile and desktop on the hardware side. Now, bear in mind 95% of the software you use doesn't use any instruction newer than that available on the Pentium III. This is a guarantee caused by legacy support in the name of getting as many customers as possible. That means your software falls into the category SISD, or Single-Instruction, Single-Data programming, where each instruction moves or manipulates exactly 1 piece of data at a time. Now, as one who studies computer science across the spectrum of theory and application at the highest and lowest levels, I've news for you: SISD computing is grinding against its theoretical limits before every performance gain is tied to clock rates per core.

 

Don't believe me? No instruction can execute faster than a single cycle. That's not a limit which can be escaped. Beyond that, all the algorithms implemented in hardware to make those instructions do what they do fall into various time complexities in the polynomial time hierarchy you'd learn about in an algorithms course. Read page 186 down of the following: http://www.agner.org/optimize/instruction_tables.pdf Those are the instruction-cycle latencies for all x86 instructions for all architectures across VIA, AMD, and Intel up through Haswell. Notice the number of cycles used for all the arithmetic instructions such as add/sub/mul/div. In integer they've all been reduced to 1-3 cycles, and anything larger than 1 can't be shrunk down anymore. There are mathematical proofs of this, but they're beyond you most likely. Algorithm Design by Kleinberg and Tardos has them if you're interested. That means Intel has done all it can to help those instructions execute any faster. Intel already has the best branch predictor which is estimated at 98% accuracy in Haswell. It also has the deepest pipeline of any existing CPU product, meaning the CPU is folding more instructions together in out of order processing to maximize throughput. The gains left to be had on SISD computing are the very last bits of residue stuck to the bottom of the barrel. The low hanging fruit has all been picked. 

 

It is up to software to then move to SIMD and stop trying to support the dinosaurs. Intel first brought out the 64-bit version of SIMD in MMX. Manipulate 2 32-bit data items at once or 4 16-bit or 8 8-bit. We're up to 256 now, or 8 32-bit data items, 16x16, and 32x8. Believe it or not, you don't have to be doing matrix multiplications or scientific computing to use and benefit from these instruction sets like AVX 256. You just have to build your code intelligently, in implicitly parallel form. It's not very difficult to do this. Any university with a computer science program worth a damn will have a high performance computing class that'll teach you the basics. Beyond this, you need a compiler which is good at optimizing the instructions used to implement the code you wrote. Here's the other big issue. Microsoft's Visual C/C++ compiler is the worst at optimization among the big 4: MSVC, GCC, Clang, and ICC. GCC and Clang are open-source and smack the living daylights out of MSVC in compile time, memory usage both during the compilation process and in the final executable runtime, and efficiency of running time. Intel beats both of them by a fair margin more, but the fact remains Intel has done the work to make computing better for everyone. The software developers have not utilized Intel's work. That's their fault.

 

Guess who also pushed multithreaded design first? It wasn't AMD by a long shot. Intel created OpenMP to help people build dynamically scaling multithreaded code back in 2000. The HPC crowd picked it right up to build the prototypes of systems before going back and hand-optimizing the threading for every last single cycle. Consumer space did nothing with it despite the fact it became an open standard in 2005-2006 and is so easy it's literally just markup language for existing C/C++ code.

 

So, this is why I say Intel has done all the work: Intel HAS done ALL the work. Idiocy and greed individually are troublesome enough. Together, they're just outright ugly.

 

And no, you're wrong about support. Microsoft CONSTRAINS the instruction sets used to build the operating system to only the oldest. Ever wonder what happens if you give a new Opcode (the binary representing assembly instructions which your CPU actually understands) to an old CPU? Your whole system crashes. Solution? Don't allow newer Opcodes. There is a better solution: an instruction dispatcher and multiple code paths to let you take the best path available for your CPU. The downside is every code path will redouble the size of the executable. Now, Windows is terribly wasteful coming in at more than double the size of Ubuntu or Fedora. Imagine 120GB or 240 just to host the OS and ensure you not only get the best performance, but that the OS can serve every CPU optimally from the Pentium III/IV all the way up to the 6700K. You'd have more than 1TB just in OS.

 

So don't try to lecture the actual expert on the matter. Shut your trap, and learn something.

 

 

see my reply above. Your view of the issue is completely misguided. Intel is doing all the work and fighting tooth and nail against both IBM and Oracle, and every innovation it uses to make the Xeon E5/E7 cores better is also put down in desktop and mobile chips. The CPU cores do not change from tier to tier other than a couple virtualization instructions and more advanced security processors demanded by high performance computing environments. Software has stagnated and hardware is leagues ahead. Intel is the last company anyone should be blaming for slow progress on performance improvements.

I just laughed so hard i startled my cat. I honestly hope you're not serious, this is hilarious. Saying the same cores go into core M as go into Xeons is laughable. That's like saying GM206 and GM200 are both the same because they're both maxwell and on the same node.

 

And why the hell would Intel be afraid of IBM and Oracle? Intel dominates everything, and is only growing. IBM and Oracle make almost all of their money nowaday off of investing in other tech companies.

 

The rest is honestly just incoherent babble. The fact of the matter is that intel isn't creating results because they don't have to. Did you ever wonder how their revenue is growing, while sales are falling? It's because they're not putting as much money into RnD anymore, seeing as they don't need to.

 

Also, just throwing this out there, intel started the whole multithreaded things because they were the first ones who's CPUs could really take advantaged of multithreaded workloads...

 

I really hope you didn't waste too much time typing, because i really don't care

[Curufinwe_wins]

Snip

Couldn't have come close to saying it better myself. Same people bitch about not having 6-8-12 core consumer chips.

[Curufinwe_wins]

I just laughed so hard i startled my cat. I honestly hope you're not serious, this is hilarious. Saying the same cores go into core M as go into Xeons is laughable. That's like saying GM206 and GM200 are both the same because they're both maxwell and on the same node.

 

And why the hell would Intel be afraid of IBM and Oracle? Intel dominates everything, and is only growing. IBM and Oracle make almost all of their money nowaday off of investing in other tech companies.

 

The rest is honestly just incoherent babble. The fact of the matter is that intel isn't creating results because they don't have to. Did you ever wonder how their revenue is growing, while sales are falling? It's because they're not putting as much money into RnD anymore, seeing as they don't need to.

 

Also, just throwing this out there, intel started the whole multithreaded things because they were the first ones who's CPUs could really take advantaged of multithreaded workloads...

 

I really hope you didn't waste too much time typing, because i really don't care

This is one of the HPC ignorant comments I have seen in quite a long time. Congratulations. Don't bother typing in response.

[Norman_the_Owl]

This is one of the HPC ignorant comments I have seen in quite a long time. Congratulations. Don't bother typing in response.

As in i'm ignorant or he's ignorant?

 

Just checkin'

[Curufinwe_wins]

As in i'm ignorant or he's ignorant?

 

Just checkin'

Nah, man. The dude I didn't comment was the person I was referring to when I said 'this... comment'. 

[Norman_the_Owl]

Nah, man. The dude I didn't comment was the person I was referring to when I said 'this... comment'. 

Just checking, lol. I really don't understand how people could think things like that and actually take themselves seriously. It's mind boggling to think that someone would say a core M has the same cores as a Xeon and actually believe themselves.

[patrickjp93]

I just laughed so hard i startled my cat. I honestly hope you're not serious, this is hilarious. Saying the same cores go into core M as go into Xeons is laughable. That's like saying GM206 and GM200 are both the same because they're both maxwell and on the same node.

 

And why the hell would Intel be afraid of IBM and Oracle? Intel dominates everything, and is only growing. IBM and Oracle make almost all of their money nowaday off of investing in other tech companies.

 

The rest is honestly just incoherent babble. The fact of the matter is that intel isn't creating results because they don't have to. Did you ever wonder how their revenue is growing, while sales are falling? It's because they're not putting as much money into RnD anymore, seeing as they don't need to.

 

Also, just throwing this out there, intel started the whole multithreaded things because they were the first ones who's CPUs could really take advantaged of multithreaded workloads...

 

I really hope you didn't waste too much time typing, because i really don't care

Look for yourself at the core and block diagrams. The exact same core goes into Core M and into Xeon. Now, you will see a difference in density because lower power chips can be packed more tightly which helps with power consumption at the sacrifice of high clock speed ceilings. That said, it's entirely true, and you have no proof to the contrary, because it doesn't exist.

 

No, GM 200 and GM 206 are built on the same cores, but different SKUs. There's debate over whether there's actually any architectural difference between GM 204/206/200 that only allows GM 200 to be DX 12 compliant, but they are all maxwell and are made on the same building blocks, namely the exact same CUDA cores, tessellation engine, ROPs, TMUs, etc.. GM 200 just has more of everything. It's the same way that every Haswell core has 4 ALUs, regardless of whether it's Core M or an E7 Xeon. Each core is exactly the same in function minus those minor details mentioned earlier about virtualization and security processors for implementing VPro. All of them are the same in function and form when it comes to actual computation. If you match the clock rates of an E3 Xeon and x7xx chip of the same generation, match a 5960X and an E5 Xeon of the same core count and cache size to the same clock rates, they perform exactly the same, because the cores are exactly the same. It goes all the way down the product stack until you break into Avoton, Atom, and Quark.

 

IBM and Oracle have gained more ground in the last two years than they had the entire prior 5 years to that. And if you look at the SAP benchmarks for business software such as database hosting and mainframe work, IBM and Oracle are still king, and that's the highest margin business in computing today. Intel is fighting for that turf tooth and nail, even if the rest of the server business is safely locked up. Seriously, do you have even a clue about the diversity and form of this industry?

 

No, Intel is creating results. Software is not keeping up because consumer software is built by firms with more interest in sales than quality. I presented proof. Where's yours?

 

Revenue is tied to sales you ditz. Profit increases would result from the same revenue levels with lowered R&D, but the reality is Intel's R&D is bigger now than it has ever been, because it is a foundry pursuing new nodes, and it builds a hell of a lot more than CPUs and SOCs and researches much more than CPUs and SOCs or foundry equipment and processes.

[patrickjp93]

Just checking, lol. I really don't understand how people could think things like that and actually take themselves seriously. It's mind boggling to think that someone would say a core M has the same cores as a Xeon and actually believe themselves.

He's calling YOU ignorant. And I have proof. You don't. Everything I've said here is factually correct backed by evidence in the real world. When you're ready to face reality, we can move on to getting at the heart of the problem: software.

[ItsGinger35]

Uh, 0.4V?! No one should be believing this. Even if you take dynamic voltage into account, the decimal precision is ALWAYS 2-3 places, even if there has to be a 0. I've never seen a CPU-Z or GPU-Z give only 1 decimal place of precision, and it's not like I tweak the software.

It's at 798MHz lol

[Statecat]

Hey! Now I feel accomplished with my 4790K.

[-rascal-]

I just laughed so hard i startled my cat. I honestly hope you're not serious, this is hilarious. Saying the same cores go into core M as go into Xeons is laughable. That's like saying GM206 and GM200 are both the same because they're both maxwell and on the same node.

 

And why the hell would Intel be afraid of IBM and Oracle? Intel dominates everything, and is only growing. IBM and Oracle make almost all of their money nowaday off of investing in other tech companies.

 

The rest is honestly just incoherent babble. The fact of the matter is that intel isn't creating results because they don't have to. Did you ever wonder how their revenue is growing, while sales are falling? It's because they're not putting as much money into RnD anymore, seeing as they don't need to.

 

Also, just throwing this out there, intel started the whole multithreaded things because they were the first ones who's CPUs could really take advantaged of multithreaded workloads...

 

I really hope you didn't waste too much time typing, because i really don't care

 

Ever since IBM ditched the consumer market, they redirected their work to High Performance Computing. Not hearing them on the "enthusiast" and "consumer" community does not mean they are doing nothing. Heck, they've already moved into Cloud computing to compete with Amazon's AWS.

 

As of recent, IBM has already got some form of 7nm transistor node working.

Stacked Silicon chips like HBM? IBM had that going back in 2010/2011.

[Norman_the_Owl]

Ever since IBM ditched the consumer market, they redirected their work to High Performance Computing. Not hearing them on the "enthusiast" and "consumer" community does not mean they are doing nothing. Heck, they've already moved into Cloud computing to compete with Amazon's AWS.

 

As of recent, IBM has already got some form of 7nm transistor node working.

Stacked Silicon chips like HBM? IBM had that going back in 2010/2011.

Yea, i know IBM has always been at the forefront of researching and developing new technologies. They created both SSDs and all of the big advancements to HDDs IIRC. Also that new still in development magnetic drives. And i know they're in high performance computing, but it's still a small share. It's not like they're the only viable option, like Intel is at most price points.

[ApolloEleven]

Alright. I lost my faith in Skylake now. I going to get a Haswell CPU, and use a CPU that's 2 years old, because there's no reason for me not to. There hasn't been a significant improvemenet in CPU Performance since Sandy Bridge.

You are looking at a rumour though.

[TroubleKlef]

my 4790k still kicking ass

[Swndlr]

14nm

[vm'N]

Don't believe me? No instruction can execute faster than a single cycle. That's not a limit which can be escaped. Beyond that, all the algorithms implemented in hardware to make those instructions do what they do fall into various time complexities in the polynomial time hierarchy you'd learn about in an algorithms course. Read page 186 down of the following: http://www.agner.org/optimize/instruction_tables.pdf Those are the instruction-cycle latencies for all x86 instructions for all architectures across VIA, AMD, and Intel up through Haswell. Notice the number of cycles used for all the arithmetic instructions such as add/sub/mul/div. In integer they've all been reduced to 1-3 cycles, and anything larger than 1 can't be shrunk down anymore. There are mathematical proofs of this, but they're beyond you most likely. Algorithm Design by Kleinberg and Tardos has them if you're interested. That means Intel has done all it can to help those instructions execute any faster. Intel already has the best branch predictor which is estimated at 98% accuracy in Haswell. It also has the deepest pipeline of any existing CPU product, meaning the CPU is folding more instructions together in out of order processing to maximize throughput. The gains left to be had on SISD computing are the very last bits of residue stuck to the bottom of the barrel. The low hanging fruit has all been picked.

Actually, you can have instruction executed in less than 1 core cycle. This was a big point of netburst, having the ALUs running 2x the core clock. So those 1 cycle latency would have ½ core clock latency.

Now, one of the big problems with netburst was the inability to keep the ALU feed, and that certain instruction would have far bigger latency in comparison and could slow down, the instruction stream.

Also in regards to the 98% claim, that does not mean 98% at every workload. The more complex the workload the bigger the chance of a misprediction. Intel most certainly have the most advanced branch predictor, but it is not perfect.

Intel does not have the deepest (longest?) pipeline.

Longer pipelines usually runs with higher frequency, like bulldozer and netburst.

That intel have the widest OoOE engine is another matter.

[themaniac]

id rather wait for it to be released to see the performance improvement instead of some leeked information that could be completely false

[patrickjp93]

Actually, you can have instruction executed in less than 1 core cycle. This was a big point of netburst, having the ALUs running 2x the core clock. So those 1 cycle latency would have ½ core clock latency.

Now, one of the big problems with netburst was the inability to keep the ALU feed, and that certain instruction would have far bigger latency in comparison and could slow down, the instruction stream.

Also in regards to the 98% claim, that does not mean 98% at every workload. The more complex the workload the bigger the chance of a misprediction. Intel most certainly have the most advanced branch predictor, but it is not perfect.

Intel does not have the deepest (longest?) pipeline.

Longer pipelines usually runs with higher frequency, like bulldozer and netburst.

That intel have the widest OoOE engine is another matter.

That's still an illusion. You only get the appearance of better throughput, but even this has theoretical bounds Intel is already grinding against. No matter how much you widen and deepen the pipeline, you're locked to your clock speed at some point by way of diminishing returns (not to mention control and data hazards flushing your pipeline anyway) and to how fast you can stream instructions and data from system memory. No instruction can ACTUALLY execute in less than 1 cycle. You can only get the illusion of it.

 

Netburst only had 2 ALUs! Haswell has 4 for crying out loud. And no, Netburst's biggest problem was a weaker branch predictor (~80% accurate) combined with (if I remember correctly) a 32 or 48 instruction deep pipeline where most software has a branch every 7-10 lines of code even if you're not dealing with AI. The pipeline was flushed way too often due to branch misses, so you couldn't get anywhere near the theoretical performance Intel was expecting. I believe the pipeline today is back up to 32 instructions deep, but that's with a 98% accurate branch predictor and hyperthreading on Xeons/I3s/I7s which lets two threads occupy one core, increasing the hazard length per process and reducing pipeline flushes.

 

And no, Intel's is the deepest pipeline. Power 8 has a 24-deep instruction pipeline. Sparc is 30 right now. Bulldozer and its derivatives are all 28 if I remember correctly. Haswell is up to 32 last I checked. No, accuracy is fixed. In a sequence, the probability it gets 1 branch prediction right is 0.98. 2 is 0.98^2. 3 is 0.98^3, etc... It doesn't matter how many options there are. Accuracy is fixed. If you have a sequence of branches in a row, that's where you start really running a risk of a pipeline flush. It doesn't matter how many options there are in a single branch. This was experimentally proven a long time ago with arbitrary wide menu selection performed at Stanford.

[Shakaza]

id rather wait for it to be released to see the performance improvement instead of some leeked information that could be completely false

And it is extremely likely that this info is false. See post #30 on page 2. 

[ErickS89]

The info looks fake even at a glance, let's just wait until the actual release and then if it sucks we can raise a riot!

[patrickjp93]

The info looks fake even at a glance, let's just wait until the actual release and then if it sucks we can raise a riot!

Pragmatism is ALWAYS the right approach. Unfortunately most humans aren't so rational.

[Richard Burton]

There's no way. It has to be much better than its predecessor

No, for the last few generations intel has been iterating with an average performance increase of 8% per generation, nothing groundbreaking...