AMD x86 16-core Zen APU detailed

[cesrai]

It does.

 

 

Then which slide I'm supposed to take ??? the one that disagrees or agrees ?? which one if more reliable ??

[flibberdipper]

AMD? Up to date? No way... MOM, AMD IS LYING AGAIN!!!

But seriously, it's about dammed time.

[Opcode]

Then which slide I'm supposed to take ??? the one that disagrees or agrees ?? which one if more reliable ??

I think the comparison slide is only suggesting the memory technology limits meanwhile the above is directly from Micron of packages that will be available later in 2015.

[patrickjp93]

MCDRAM is not HMC but an altered variant that Intel built with Micron specifically for KL. Neither of which are even standardized.

HMC is standardized, just not by JEDEC. There's a ton of companies in the HMC consortium, and frankly it's time JEDEC stepped aside. They've slowed down DRAM progress for far too long.

[patrickjp93]

I wonder how that relate to my statement you quoted?

Is it just me, or does the slide you posted disagree with your statement?

All this FUD spreading around..

Then having 2x16 zen core die in MCM would fit the rumoured 32c/64t SKU that were floating around.

Old slides from late 2013/early 2014. MCDRAM (Memory Cube DRAM hint hint @Opcode) beats the living daylights out of HBM 1.0 bandwidth.

[Briggsy]

Bout time AMD started doing hyperthreading. Sun Microsystems were doing it decades ago (single cores with 24 multi-threads or some crazy ****), then intel caught on to the benefits. As for people crying over integrated graphics on a cpu, since when was this an issue? Moving forward we are seeing more and more background uses happening with iGPU, even when a pc has discrete graphics. That being said, if they can cram enough gpu cores onto the die with HBM unified memory, why would you even need a discrete GPU, when the APU would essentially be the same thing, with that kind of memory bandwidth. smh. No one likes progress. Word is they are even talking 300 Watt TDP APUs @ 14nm. Thats absurd.

[Opcode]

Old slides from late 2013/early 2014. MCDRAM (Memory Cube DRAM hint hint @Opcode) beats the living daylights out of HBM 1.0 bandwidth.

MCDRAM (Multiple Channel DRAM) or another fancy word for HBM is not exactly the same as HMC (Hybrid Memory Cube).

 

You referenced in a previous post that HMC itself can exceed 340 GB/s.

 

Funny, because it seems to me the MCDRAM blocks aboard KNL individually top out at 340GB/s

 

MCDRAM is a hacked up variant of HMC that adds in channeling to make it effectively similar to HBM just without the need for an interposer.

[RexinOridle]

A single A10 7850K core is on par with a single FX 8350.

If a single Zen core is as powerful as 7850K (Hopefully a lot more) and CPU has 16 CPU cores and 32 threads, with 16 GB HBM on chip, we are talking about game changing multi threading performance here.

[Sharkyx1]

Bout time AMD started doing hyperthreading. Word is they are even talking 300 Watt TDP APUs @ 14nm. Thats absurd.

Well we had to wait for a new architecture from AMD, they weren't just going to magically add HT to Bullldozer, They bet on physical multithreading being the future and they had to pay for their bad bet, hopefully this new architecture can be a solid base for competing with intel.

 

point 2, Aren't intel server chips rated for 150w? i imagine the 300w AMD number is only going to be in play if you load the CPU and GPU, if its just a CPU task i imagine the consumption would be way more competitive, and in a task that needs GPUs an intel system would need one anyways.

[Sharkyx1]

A single A10 7850K core is on par with a single FX 8350.

If a single Zen core is as powerful as 7850K (Hopefully a lot more) and CPU has 16 CPU cores and 32 threads, with 16 GB HBM on chip, we are talking about game changing multi threading performance here.

Wouidn't that effectively be the same performance as the opterons out now? 16x a single 8350 core? this arch better deliver 2x the performance of BD if it wants to keep up.

[Briggsy]

Well we had to wait for a new architecture from AMD, they weren't just going to magically add HT to Bullldozer, They bet on physical multithreading being the future and they had to pay for their bad bet, hopefully this new architecture can be a solid base for competing with intel.

 

point 2, Aren't intel server chips rated for 150w? i imagine the 300w AMD number is only going to be in play if you load the CPU and GPU, if its just a CPU task i imagine the consumption would be way more competitive, and in a task that needs GPUs an intel system would need one anyways.

 

Yeah, I realize they needed a new architecture to do multi-threading. My remark about the 300W tdp being absurd is more out of excitement than any negativity. The potential is insane.

[RexinOridle]

Wouidn't that effectively be the same performance as the opterons out now? 16x a single 8350 core? this arch better deliver 2x the performance of BD if it wants to keep up.

 

Exactly. It will be like getting a consumer version of an Opteron. All the video encoding, physics processing, rendering. I can't say much about gaming and multithread, but onboard HBM should speed things up.

[Sharkyx1]

Exactly. It will be like getting a consumer version of an Opteron. All the video encoding, physics processing, rendering. I can't say much about gaming and multithread, but onboard HBM should speed things up.

This is an opteron though, not a consumer part, didn't you see the ECC memory? 

[GoodN1ght]

This is an opteron though, not a consumer part, didn't you see the ECC memory? 

Some Xeons are consumer grade. 

[Sharkyx1]

Some Xeons are consumer grade. 

Yeah i know their are Xeons that are just rebranded i5s and i7s but they run on consumer (Xx7) chipsets no? they don't use ECC afaik

[RexinOridle]

This is an opteron though, not a consumer part, didn't you see the ECC memory? 

 As far as I know all AMD FX and APU supports ECC. Doesn't matter consumer or server.

[GoodN1ght]

Yeah i know their are Xeons that are just rebranded i5s and i7s but they run on consumer (Xx7) chipsets no? they don't use ECC afaik

Yeah a couple of them support ECC

[Zah]

So can I mine with this thing?

 

How many FPSes can I got in the Crysises?

[patrickjp93]

Yeah i know their are Xeons that are just rebranded i5s and i7s but they run on consumer (Xx7) chipsets no? they don't use ECC afaik

They can use ECC memory. What do you think the Q chipsets are for?

[khidu92]

Come on baby just one more year * talking to my beloved Phenom II*

 A 8 cores AMD CPU with single core performance equal Ivy bridge or Haswell is my dream. 

[HalGameGuru]

Well we had to wait for a new architecture from AMD, they weren't just going to magically add HT to Bullldozer, They bet on physical multithreading being the future and they had to pay for their bad bet, hopefully this new architecture can be a solid base for competing with intel.

 

point 2, Aren't intel server chips rated for 150w? i imagine the 300w AMD number is only going to be in play if you load the CPU and GPU, if its just a CPU task i imagine the consumption would be way more competitive, and in a task that needs GPUs an intel system would need one anyways.

 

To be fair their version of multi-threading wasn't the problem it was their IMPLEMENTATION. THey cut corners in its design and assembly that wound up hobbling it royally. With a proper build up their avenue of MT would have worked fine. The places they cut corners wouldn't have mattered with FULL HSA where the GPU could take up the slack, but in a straight CPU where it has hold itself up the MASSIVE tradeoffs meant per core performance was always going to be awful. IF they had built it with proper industry competitive level components it would have been competitive across the board.

 

ZEN is really going to be a CPU designed the RIGHT way in the same family of operation as an Intel CPU. Had they given bulldozer ZEN level support and required ZEN level sophistication there never would have been that debacle.

[mikat]

What if Intel made a consumer CPU with 16 cores? Would you make the same complaint? According to AMD's own definition, Intel makes APUs.

i hope you know that this APU is for servers?

[mikat]

It seems to me that the GPU portion is a separate die entirely, so it's not really taking away from the CPU so much as it is making it a more versatile platform.  

thanks for explaining, i didnt know that

 

(btw im not sarcastic)

[Notional]

It seems to me that the GPU portion is a separate die entirely, so it's not really taking away from the CPU so much as it is making it a more versatile platform.  

 

Not correct, only Intel does this (with their iris pro?), as the CPU and GPU has no HSA or similar advanced functionality. This is a picture of an AMD APU die:

 

[sgloux3470]

Not correct, only Intel does this (with their iris pro?), as the CPU and GPU has no HSA or similar advanced functionality. This is a picture of an AMD APU die:

 

That is their current APU design, not the new Zen based design the OP is talking about.

 

AMD is using coherent fabrics to interconnect the Zen CPU die and Greenland graphics die, and it also uses coherent fabric for inter communication between Zen die CPUs and Caches, PSP, Times, counters, ACPI or Legacy interface, GMI Physics, Combo Physics, Host Controllers like USD, SATA or GbE and Memory controllers. GMI stands for Global Memory interconnect and this is the interface between Zen die and Greenland die, or between two chips on the same multi-chip module package.

 

My interpretation of this is that the dies are considered separate.