navi 31 Radeon RX 7900 XT PCB Layout Leaks Out: Reveals AMD's Chiplet Design, 24GB VRAM Configuration and 450W Power Specs

[Shzzit]

3 hours ago, Senzelian said:

The infinity cache is smaller than last gen. 

128MB 6900XT

96MB 7900XT

 

Does anyone have an idea why that could be?

I guess the wider bus probably helps.

My guess like last time is to gimp the performance so later they can add more cache and get good gains with out doing much. 
 

 

[porina]

10 hours ago, Senzelian said:

The infinity cache is smaller than last gen. 

128MB 6900XT

96MB 7900XT

 

Does anyone have an idea why that could be?

I guess the wider bus probably helps.

If you look at the table it seems the cache amount is proportional to the bus width, suggesting the two may be closely linked. Cache optimisation is a balance of many factors, so a "better" connection after the cache can mean a smaller cache is more efficient overall.

[leadeater]

4 hours ago, porina said:

If you look at the table it seems the cache amount is proportional to the bus width, suggesting the two may be closely linked. Cache optimisation is a balance of many factors, so a "better" connection after the cache can mean a smaller cache is more efficient overall.

And more cache than is required add no performance at all, so the most basic explanation is more simply isn't required and would not increase performance. That said I expect there is more balance than that and more would but I just don't know by how much, and I doubt people really want to pay the premium for the extra die area on such an expensive node for cache which isn't even close to as dense as logic is.

[Rauten]

I hope, for everyone's sake, that their 4K performance has noticeably improved.

[ewitte]

On 9/18/2022 at 7:52 AM, leadeater said:

And more cache than is required add no performance at all, so the most basic explanation is more simply isn't required and would not increase performance. That said I expect there is more balance than that and more would but I just don't know by how much, and I doubt people really want to pay the premium for the extra die area on such an expensive node for cache which isn't even close to as dense as logic is.

Its probably the same as clock speeds.  For 6900xt it worked because the bus with was so low.  If the difference between 96MB and 128MB only gives a few percent better performance it may not be worth it.  My guess is the performance increase for the 6900XT was WAY more.