Reddit user allegedly gets hands on Intel i9 12900K

[Mark Kaine]

I have a feeling ADL will be released before @Seby9123gets his hands on a good mobo/ram combo...

 

That said I'd definitely be interested in the results,  i expect a mess however,  especially in gaming since Intel declares "developers need to plan carefully..." i just think there'll be a lot of compatibility and optimization issues,  which wouldn't be surprising since this is a new approach...

 

 

[Seby9123]

I saw the Geil DDR5 sticks in stock the second they were out, and also purchased but canceled the team group ones, but just too ugly for me.

Just going to go ahead and get whatever next time I can though, since they will have 16Gb Micron Rev A, which I am interested in testing alongside G.Skill's 16Gb Samsung B-die.

 

As for board, can ASUS please not delay the Maximus Z690 Apex for too long, don't want to have to get a hero.

[leadeater]

3 hours ago, WolframaticAlpha said:

Seby9123 hasn't actually tried the processor out because they don't yet have a motherboard on which to install it.

BOOOOooo, booooooo. Baited so hard lol. No benchmarks, come on get out of here with that tease 

[Dracarris]

17 minutes ago, Seby9123 said:

 

I saw the Geil DDR5 sticks in stock the second they were out

 

What, Geil still makes DRAM? I had modules from them in my Core 2 Duo machine from the mid-2000s.

[leadeater]

2 hours ago, Master Disaster said:

Pro tip: Never believe anything you hear about a product until its in the hands of independent reviewers. Manufacturers have a habit of cherrypicking the good numbers and totally omitting the rest.

How independent, Anandtech or Principled Technologies .. (ah shit forgot their name, that company Intel hired, starts with P)

 

 

Ahhhh bad memory killing the joke 

 

Edit: Yay Google foo did not fail me.

[Seby9123]

12 minutes ago, Dracarris said:

What, Geil still makes DRAM? I had modules from them in my Core 2 Duo machine from the mid-2000s.

https://www.newegg.com/geil-32gb-288-pin-ddr5-sdram/p/N82E16820158946

[Dracarris]

1 minute ago, Seby9123 said:

https://www.newegg.com/geil-32gb-288-pin-ddr5-sdram/p/N82E16820158946

I wonder if it's the same company. My RAM was from G.e.i.l.

[cj09beira]

21 minutes ago, leadeater said:

How independent, Anandtech or Principled Technologies .. (ah shit forgot their name, that company Intel hired, starts with P)

 

 

Ahhhh bad memory killing the joke 

 

Edit: Yay Google foo did not fail me.

the name is so ironic its not even funny.

[WolframaticAlpha]

1 hour ago, Seby9123 said:

I saw the Geil DDR5 sticks in stock the second they were out, and also purchased but canceled the team group ones, but just too ugly for me.

Just going to go ahead and get whatever next time I can though, since they will have 16Gb Micron Rev A, which I am interested in testing alongside G.Skill's 16Gb Samsung B-die.

 

As for board, can ASUS please not delay the Maximus Z690 Apex for too long, don't want to have to get a hero.

Do the 5950X and 10900k results beforehand.

[tkitch]

1 hour ago, Dracarris said:

What, Geil still makes DRAM? I had modules from them in my Core 2 Duo machine from the mid-2000s.

I have one and a half sets of 2x8gb CL16 Geil RAM sitting on my desk at work.  

[jaslion]

2 hours ago, Rauten said:

I honestly don't get these reactions to Alder Lake. 

If you are running a task that demands full power, you get full power. If you are running a task that requires 2W, you get 2W.

Is there a negative to this I'm missing? Honest question.

Thats the thing we already can do that

[Seby9123]

True, last time I did it was a while back, and especially SOTTR got updated to get way more FPS.

I do 1080P ultra, and last time I used 3090, but this time I’m using my 6900XT since it is way more convenient, and much faster at 1080 anyway.

Stock 5950X beats 10900K by a lot, but RAM OC barely helps 5950X while giving the 10900K an insane boost, pushing it easily past the 5950X.

 

RAM OC is all subtimings tuned btw, XMP is garbage.

 

 

Interested to see if the 6900 makes the gap wider, and should I OC it? My 6900 is ridiculously fast with OC, can go from 2500mhz stock to 3050Mhz under load. 
 

https://www.3dmark.com/hall-of-fame-2/fire+strike+3dmark+score+ultra+preset/version+1.1/1+gpu

 

Guess it’s easier to be consistent just keeping GPU stock though.

 

[Seby9123]

More DDR5 from my favorite brand! 
 

https://www.newegg.ca/oloy-32gb/p/N82E16820821448

 

 

[leadeater]

14 minutes ago, jaslion said:

Thats the thing we already can do that

Alder Lake I think is more focused on mobile and small form factor, that's what I think anyway. Golden Cove is a typical generational improvement to Intel's architecture but the Alder Lake design itself I think is born from the need for low power, very low power and that's where it makes the most sense.

 

Also Apple's M1 Pro and M1 Max should be a fair decent nod toward where higher power designs like this should really go, they however do have the advantage of being on TSMC 5nm though. Having some low performance cores for the things that truly do not need the performance has a benefit of not being scheduled on to performance cores and getting in the way of priority process/threads.

 

This is also why I think AMD isn't interested in hybrid architectures right now because their Zen 3 core architecure already is rather power efficient and when in an SoC of 15W or ~35W the performance and power efficiency already is very strong so I doubt AMD is willing to invest in yet another new thing, because they have a lot of new things in the works right now and in various stages of polishing. One of the more rooted criticisms of AMD that has stuck around is that lack of polish, they never really seems to truly nail something down like Intel of Nvidia does before moving on to the next thing.

 

And at the very least I'm glad Intel is actually showing some level of technology leadership because it's seldom they do anything like that in the CPU industry i.e. 64bit, multicore die, multi socket interconnects.

[WolframaticAlpha]

tbf you do not need more than 12 threads when gaming. The additional small cores only become of use when using productivity wares.

 

It is rumored that the sku config is: 

8+8 for i9

(maybe 8+8 for some i7s)
8+4 for i7

6+4 for i5-K series

6+0 for normal i5

4+0 for i3

[Seby9123]

All i7 are 8+4

i9 on top of having more cache from the extra little cores, also has more cache per core, 3MB, versus the rest of the lineup's 2.75MB per core.

 

Should be interesting to see gaming performance difference between 12700K and 12900K, because it should be bigger than expected from core count alone.

[leadeater]

4 minutes ago, Seby9123 said:

i9 on top of having more cache from the extra little cores, also has more cache per core, 3MB, versus the rest of the lineup's 2.75MB per core.

Strange, each LLC slice is 3MB so disabling some of it feels a bit strange. Though I guess since both the i9 and i7 have the same number of performance cores that's a move to have a performance difference between the two and also improve product yield too (probably).

 

Goes a little against Intel's presentation but that was more showing the archecture as a whole and not the actual products. I hate it when Intel does that type of thing though.

[Mark Kaine]

Do a RPCS3 before and after,  please! All I care about and i expect ADL to be awful.  : D 

[AldiPrayogi]

The packaging is super cool

[porina]

23 hours ago, leadeater said:

And at the very least I'm glad Intel is actually showing some level of technology leadership because it's seldom they do anything like that in the CPU industry i.e. 64bit, multicore die, multi socket interconnects.

Are we talking x86 or wider CPU industry here? Itanium was around long before x86-64 was a thing, and I still wonder to this day what we might have with a native 64 bit implementation instead of x86-64 mess. HT was also around years before AMD went SMT. Multicore to me was more a matter of timing. It is usual for the non-leader in a space to try harder to disrupt the leader, since doing the same thing isn't as likely to advance their position. Besides, in those days, dual-socket consumer boards were common and satisfied that niche.

 

22 hours ago, leadeater said:

Goes a little against Intel's presentation but that was more showing the archecture as a whole and not the actual products. I hate it when Intel does that type of thing though.

Most manufacturers tend to show the maximum configuration and then break down into lower offerings from there.

[leadeater]

16 minutes ago, porina said:

Are we talking x86 or wider CPU industry here? Itanium was around long before x86-64 was a thing, and I still wonder to this day what we might have with a native 64 bit implementation instead of x86-64 mess. HT was also around years before AMD went SMT. Multicore to me was more a matter of timing. It is usual for the non-leader in a space to try harder to disrupt the leader, since doing the same thing isn't as likely to advance their position. Besides, in those days, dual-socket consumer boards were common and satisfied that niche.

As a whole, but mainly after PIII. True IA64 was 2 years before x86-64 but I don't actually believe a hard cut to 64bit was any better than x86-64 at the time.

 

Also I didn't mean consumer multi socket, just the technology itself which was really made for their Opteron product line. Hypertransport was also the same technology used for multi socket systems and Infinity Fabric is still based on that same technology today. AMD had 8 socket systems with direct CPU to CPU connectivity with CPU integrated memory controllers back when Intel was shoveling literally everything through the FSB.

[leadeater]

18 minutes ago, porina said:

Most manufacturers tend to show the maximum configuration and then break down into lower offerings from there.

Yea just seemed like a strange choice to cut down is all, number of cores etc is like the more obvious but limiting the active LLC not as much. But I get it since i7 and i9 have the same number of P cores.

 

More typically the amount of cache is based on the active cores and disabling parts of LLC slices is much less common. Pretty sure Intel has done it in the past but I couldn't name what on, AMD has too.

[LazyPCRehab]

Got a motherboard that's a little borked, currently waiting on 12th Gen so I can update my 9th Gen and the board at the same time. 

[porina]

37 minutes ago, leadeater said:

More typically the amount of cache is based on the active cores and disabling parts of LLC slices is much less common. Pretty sure Intel has done it in the past but I couldn't name what on, AMD has too.

I tend to look at it per-core. I guess an example would be looking back to the quad core era, you had i7 at 2MB/core, and i5 at 1.5MB/core. Weirdly i3 could go either way. Xeons I think had 2.5 MB/core, but based on different die so not necessarily comparable.

[leadeater]

59 minutes ago, porina said:

I tend to look at it per-core. I guess an example would be looking back to the quad core era, you had i7 at 2MB/core, and i5 at 1.5MB/core. Weirdly i3 could go either way. Xeons I think had 2.5 MB/core, but based on different die so not necessarily comparable.

Actually disabling L3 cache from Intel has been way more common than I remembered, went back and checked Sandy Bridge all the way through and yea done every time. I'm too used to looking at the Xeon lineup where this is a lot less common and caches scale with the cores (typically) heh.

 

Jump on Intel Ark and have a look at any of the Xeon product generation pages and sort by Cache and you'll see what I mean. There are special cases for CPUs like the 6354 which is optimized for SQL type workloads or anything else that likes really large cache to core ratio.