Unannounced AMD 400-Series Chipset Appears In PCI-SIG Integrators List

[leadeater]

27 minutes ago, cj09beira said:

So this only tells us that Amd will still use a x4 connection to the chipset, I just want my 24 lanes (in case they want to keep x4 for the m.2) so that I can get x16/x8 crossfire

edit: i know that 32-4!=30 

Actually I'm pretty sure it doesn't tell us much about the lane counts at all. That is just validation testing on the PCIe controllers to make sure they are up to spec, Max Lane Width Tested is the largest possible lane count in a single slot/device connection for the target system so they have to test at that.

 

So basically we know there is a possible device connection of x8 in a Raven Ridge system, I guess that means you wouldn't want to be putting in any high end GPUs like a Titan V because that actually needs x16.

[cj09beira]

1 hour ago, leadeater said:

Actually I'm pretty sure it doesn't tell us much about the lane counts at all. That is just validation testing on the PCIe controllers to make sure they are up to spec, Max Lane Width Tested is the largest possible lane count in a single slot/device connection for the target system so they have to test at that.

 

So basically we know there is a possible device connection of x8 in a Raven Ridge system, I guess that means you wouldn't want to be putting in any high end GPUs like a Titan V because that actually needs x16.

i know.

those will probably only have 4 cores anyways so it wouldn't be the best place to use a 3000 dollar gpu  

[NumLock21]

6 hours ago, cj09beira said:

i know that 32-4!=30 

I know that 1+1!=0

[cj09beira]

3 minutes ago, NumLock21 said:

I know that 1+1!=0

i first got it wrong, then edited it

 

[cj09beira]

the comment was for anyone that saw the original comment