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1 minute ago, Apex_X said:

Why?

One word: IPC. Or how many instructions a CPU can execute per GHz. Kabylake has almost 2x better IPC than Vishera ;)

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It's a little thing called instructions per clock, often abbreviated as IPC. It's the amount of work (instructions) a CPU can carry out per clock cycle, or every time it switches on and off. It is determined by how the architecture is constructed, and it can get very complex very quickly. So, don't worry about the details; just remember that it's generally the cause of one CPU performing better than another at the same clock speed.

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Clock speed isn't everything. You will be able to do more on a computer with an i7 running at 2.8GHz than you can with a Pentium 4 running at 2.8GHz. As @Shakaza and @PCGuy_5960 have said, IPC is very important. 

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Instructions Per Clock. The entire Bulldozer architecture was built around something not really made for the desktop environment, and as a result, means that a single Bulldozer core or Bulldozer derivative core is kinda crap.

Altogether in good scenarios (i.e. video rendering), an FX-8320 can keep up with an Ivy Bridge i7 while it'll get shat on by i3s in single-threaded or poorly threaded environments.

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8 minutes ago, dogetorhue said:

Not to mention that something like a FX-9590 draws over 220W while other 8-core parts can be 65-100w. All that power = more heat = thermal throttling, even with the best cooling solutions.

Thermal throttling isn't what makes the 9590 perform horribly -- it certainly won't make it perform any better, but even when it's not throttling it gets beat.

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There's also the thing called one FPU per Core module. By doing so one core from two-core module literally can block other one from doing it's work - that's why even why you're "cpu bottlenecked" at AM3+ CPUs you don't necessary hit 100% utilization. ;)

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Performance notwithstanding, Zambezi and Vishera were huge CPU dies, meaning expensive to make. If AMD has many of these kicking around in warehouses, that would be a pretty sizeable loss.

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12 minutes ago, Zubkover said:

There's also the thing called one FPU per Core module. By doing so one core from two-core module literally can block other one from doing it's work - that's why even why you're "cpu bottlenecked" at AM3+ CPUs you don't necessary hit 100% utilization. ;)

That's what most people overlook. One FPU per module was not the best idea. 

 

Those FX 4100s would not have been an enjoyable time I imagine. 

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this diagram represents one bulldozer "unit".

One unit is TWO cores, so a 8-core FX will have four of these.

Front_Unit_M.jpg&f=1

You can see that the two cores is a lie. One FX unit is really two integer units sharing resources and instruction pipline with one floating point unit.

Games use more floats than integers, which is why FX perform so badly in games, and why a 8core FX is equivalent to a quad core i5. 

AMD was a bit misguided. They thought software would have more FPU calculations offloaded to the GPU, and they thought if they threw an extra integer core into every unit they could increase the clock rate. They were successful in increasing the clock rate as FX has the overclock record, they were just naive in thinking where software would go.

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2 minutes ago, DildorTheDecent said:

That's what most people overlook. One FPU per module was not the best idea. 

 

Those FX 4100s would not have been an enjoyable time I imagine. 

Here to confirm that the FX-4100 is really not the absolute shittiest thing you can own.

Try a single core Sempron.

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1 minute ago, Dan Castellaneta said:

Here to confirm that the FX-4100 is really not the absolute shittiest thing you can own.

Try a single core Sempron.

Sempron has a single core = automatically shitty. 

 

How about something that's multicore and shitty? -> FX 4100

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Just now, DildorTheDecent said:

Sempron has a single core = automatically shitty. 

 

How about something that's multicore and shitty? -> FX 4100

FX-8100. Now that's purposeless.

Again, owner of FX-4100 who just decommissioned it.

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57 minutes ago, djdwosk97 said:

Thermal throttling isn't what makes the 9590 perform horribly -- it certainly won't make it perform any better, but even when it's not throttling it gets beat.

All Bulldozer and its derivatives should be simply remembered as the Space Heater days of AMD. Though to be fair, I don't think that's completely over since I heard Vega was pretty hot literally, and actually kinda crappy for what it is. Credit where it is due is that it's competitve to the 1070s and 1080s which is something AMD needed to do but there was that hope that they would've made a 1080ti killer out of Vega too.

 

Hopefully since Navi is an entirely new architecture (because iirc Vega was heavily based off Polaris?)

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Architecture, IPC, Lithography, Controllers, Drivers, Chipset, BIOS, Supported Memory Frequencies.... So on...

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6 hours ago, DildorTheDecent said:

Sempron has a single core = automatically shitty. 

 

How about something that's multicore and shitty? -> FX 4100

Hey now, when my dad upgraded from his 286-10 to his 486-120, it was, IIRC, several DOZEN times faster, and it was still only a single core. :P 

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7 hours ago, Apex_X said:

So, I know that an i5 or ryzen will overperform the FX-series, but why? Some have higher cores and GHZ, like the 9590, 8C 4.7GHZ. But like an i5-7600K, 4C 3.8GHZ, lower, but better. Why?

I would argue the two biggest issues with that architecture are:

  • Too many stages in the pipeline, which means if you have to branch (and there's a lot of branching) and it mispredicts, the processor has to basically dump what it was working on because it's no longer valid
  • Each "core" is weaker than the previous generation. It heavily relied on multithreaded applications, which most day-to-day programs don't scale well.

Deep pipelines let you increase the clock speed, which would make up for the weaker per-core performance. But you can only increase it so much before your TDP goes through the roof.

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1 hour ago, M.Yurizaki said:

I would argue the two biggest issues with that architecture are:

  • Too many stages in the pipeline, which means if you have to branch (and there's a lot of branching) and it mispredicts, the processor has to basically dump what it was working on because it's no longer valid
  • Each "core" is weaker than the previous generation. It heavily relied on multithreaded applications, which most day-to-day programs don't scale well.

Deep pipelines let you increase the clock speed, which would make up for the weaker per-core performance. But you can only increase it so much before your TDP goes through the roof.

Let us not forget the glory days of the 31-stage Netburst Pentiums. Vishera had a 20-stage pipeline compared to some recent Intel CPUs which were like 15-20 stages, and Ryzen, which is 19 stages. So while it may not have helped, a deep pipeline isn't what killed Vishera. 

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8 minutes ago, djdwosk97 said:

Let us not forget the glory days of the 31-stage Netburst Pentiums. Vishera had a 20-stage pipeline compared to some recent Intel CPUs which were like 15-20 stages, and Ryzen, which is 19 stages. So while it may not have helped, a deep pipeline isn't what killed Vishera. 

I thought it was deeper than that. Or it had a higher misprediction penalty.

 

Either way each integer core was at the least weaker than K10. So even if it had a decent front end it still suffered in single core performance

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Just now, M.Yurizaki said:

I thought it was deeper than that. Or it had a higher misprediction penalty.

 

Either way each integer core was at the least weaker than K10. So even if it had a decent front end it still suffered in single core performance

FPUs shared a fetch/decode stage.

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5 hours ago, M.Yurizaki said:

I thought it was deeper than that. Or it had a higher misprediction penalty.

 

Either way each integer core was at the least weaker than K10. So even if it had a decent front end it still suffered in single core performance

https://www.anandtech.com/show/5057/the-bulldozer-aftermath-delving-even-deeper/12

The branch misprediction on the long pipeline without a micro-op cache meant whenever a branch went wrong the performance dropped noticeably. Also the L1 cache associativity was too low in some cases.

 

They aimed for a high clock speed, low IPC architecture and failed. Excavator , the 4th generation Bulldozer chip only drew the Phenom II in terms of IPC according to someone on this forum.

 

AMD also designed the FP unit to be able to calculate 2 128bit instead of 1 256 bit depending on the workload, however seemingly never worked

 

 

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