AMD & Hynix Finalize HBM 3D Memory, Massive Improvement Over GDDR5.

[TechFan@ic]

Lets start with some figures, 65% performance improvement over GDDR5, 40% power reduction and 37X size reduction over DDR4.

This new memory technology is AMD's & Hynix's answer to supplying the next generation of APUs & GPUs with the necessary memory bandwidth to reach maximum performance, essentially eliminating one of the major bottlenecks of GPGPU compute present today.

HBM stands for High Bandwidth Memory, and it's made essentially by stacking multiple memory chips on top of each other via die-stacking technology, creating a 3D memory structure made up of a large number of memory floors.




HBM doesn't increase bandwidth by raising memory frequency similar to GDDR5 rather by significantly increasing the number of channels through which the data can travel.

Think of GDDR5 as a Ferrari and HBM as a bus, while people represent data or bits.
The bus is slower but can carry a significantly larger number of people.

Similarly HBM is slower than GDDR5 in terms of frequency but can move orders of magnitude more data in the same time period as GDDR5
 

Bryan Black, Sr Fellow and 3D program manager at AMD noted that while die stacking has caught on in FPGAs and image sensors “..there is nothing yet in mainstream computing CPUs, GPUs or APUs” but that “HBM (high bandwidth memory) will change this.”  Black continued,  “Getting 3D going will take a BOLD move and AMD is ready to make that move.” Black announced that AMD is co-developing HBM with SK Hynix which is currently sampling the HBM memory stacks and that AMD “…is ready to work with customers.”

 

According to Bryan Black, AMD is ready to make the move to HBM memory and Minsuk Suh, principle engineer at Hynix confirmed that they are readying both 3D stacked memory for main memory and 3D stacked HBM for networking and graphics applications. JEDEC specifications for these products are “mostly finalized.”
Suh indicated that the first application for HBM would be GPUs and that it will next move to networking and HPC applications.
This suggests that AMD's upcoming generation of discrete GPUs is likely to use the new HBM technology.

Source

[qwertywarrior]

of course they are

they need something to fight with nvidia's Volta

 

also this will help their future APUs

[GPUXPert]

of course they are

they need something to fight with nvidia's Volta

 

also this will help their future APUs

 

The take home message is that AMD had stacked memory on GPUs ready and waiting in late 2011. They still have that knowledge and can roll it out at any time for any product they choose to, top to bottom, mobile or discrete. AMD did not crow about it years prior to Tahiti, they just did the engineering quietly in a lab somewhere and worked all the kinks out. Nvidia is now talking about doing the same in with Volta in 2016?

 

http://semiaccurate.com/2013/05/20/nvidias-volta-gpu-raises-serious-red-flags-for-the-company/

It's called marketing, Nvidia is good at it.

[TheMissxu]

Just put it on my #@$% graphics card already!

[ShiverMePenguins]

And amd still doesn't care about marketing lol. Can't wait to see the performance of this with apu's. That and the graphics. And has some nice stuff going for them. Too NAD the motherboards are terrible and the laptops all have terrible build quality.

[Gnator]

When i first heard about 3d memory/ process i was quite excited. To think I will be able to used them in the near future is just awesome

[Emperor_Piehead]

with the claimed 37x times smaller Maybe they could implement some of this onto the apu die or maybe do what intel did with the iris 5200 where it's soldered to the mobo and has that extra die next to the cpu for ram.

[bob345]

this is pretty cool. I wonder how long this will take to enter the consumer market

[Blue fellow]

http://semiaccurate.com/2013/05/20/nvidias-volta-gpu-raises-serious-red-flags-for-the-company/

It's called marketing, Nvidia is good at it.

 

But AMD has yet to release it despite it supposedly being ready for 2 years? Why isn't that a red flag?

[ShiverMePenguins]

But AMD has yet to release it despite it supposedly being ready for 2 years? Why isn't that a red flag?

I know that canon is sitting on some sensor tech that they aren't releasing because right now they still control much of that market

[atomicmonkey101]

good for the mobile platform too if it makes it there. less power consumption is always better.

[Blue fellow]

I know that canon is sitting on some sensor tech that they aren't releasing because right now they still control much of that market

 

But AMD has been in an awful spot, particularly when this technology was claimed ready for release.

 

http://www.amd.com/us/press-releases/Pages/press-release-2013jan22.aspx

 

I forget the total lay off number between 2012 Q4 and 2013 Q1, but I believe it was in the range of 15-20% of their employees. 

 

 

I think Nvidia saying that they'll have this technology in 2015 was just being realistic. AMD can have all the working engineering chips in the world, but it doesn't matter if it's not on a product. And who is to say that Nvidia also doesn't have similar progress in-house? 

[Equlix]

I think nvidia maybe want to get one or two generations of project denver under their belt before launching stacked ram. they could possibly have it ready in early 2015 but if its not compatible with denver its useless tech.

[TechFan@ic]

But AMD has yet to release it despite it supposedly being ready for 2 years? Why isn't that a red flag?

If you follow GPU & CPU design closely you will notice that companies tape out chips 16 to 24 months before actual silicone is produced, that simply has to do with the manufacturing ramp up at the fab level.

Die-stacking existed since 2011 in an FPGA product launched by Xilinx, it was a very small and very simple chip.

The main reason why it doesn't exist in GPUs yet has to do with cost and complexity, AMD would have to wait until the cost/GPU or APU is commercially viable for mass production.

I have no idea if Nvidia is going to be using this same Hynix memory tech, all what Nvidia publicly revealed was that they intend to use similar technology in some form of GPU product belonging to the Volta family in the future.

On a different note, AMD will likely completely negate DDR4 and jump straight to HBM, that explains lack of DDR4 support with Carrizo APUs.

[Navin]

Isn't this similar to what nvidia is going to do with Volta ??

[TERAFLOP]

Isn't this similar to what nvidia is going to do with Volta ??

Only difference is Nvidia's 2 years late.

[qwertywarrior]

wait data rate is only 1Gbps ??

 

the total stacked DRAM bandwidth on volta is 1TBps

 

 

i wonder how important I/O is to GPU

[totjup5]

This is getting interesting. I look forward to a year from now when I'm due for an upgrade to see how this plays out.

[CarlosRex]

But AMD has yet to release it despite it supposedly being ready for 2 years? Why isn't that a red flag?

The article says that AMD has just now finalized the technology so that's why,

Principle engineer at Hynix says it will be introduced with new GPUs and we know for a fact that Maxwell will not have stacked DRAM, and we now know that AMD will have stacked DRAM on their upcoming architecture.

This means AMD will have stacked DRAM all to their selves in 2014 and 2015 until Volta shows up in 2016.

 

[EmmaLong]

But AMD has been in an awful spot, particularly when this technology was claimed ready for release.

 

http://www.amd.com/us/press-releases/Pages/press-release-2013jan22.aspx

 

I forget the total lay off number between 2012 Q4 and 2013 Q1, but I believe it was in the range of 15-20% of their employees. 

 

 

I think Nvidia saying that they'll have this technology in 2015 was just being realistic. AMD can have all the working engineering chips in the world, but it doesn't matter if it's not on a product. And who is to say that Nvidia also doesn't have similar progress in-house? 

Volta is coming in 2016 not 2015, AMD has a very large & steady stream of revenue coming from game consoles which will ensure sizable profits for the foreseeable future.

Also we know for a fact that Nvidia didn't make similar progress, since they're saying Volta will have it in 3 years, while AMD says it's ready to go for upcoming GPUs.

[MattDaemontools]

I think it all comes down to Nvidia talking the talk while AMD actually walking the walk.
Nvidia is bragging about a technology they don't yet have, while AMD is being modest about the same technology that they actually already have.

[bowman]

On a different note, AMD will likely completely negate DDR4 and jump straight to HBM, that explains lack of DDR4 support with Carrizo APUs.

Indeed

[PhilBoisvert]

Funny how people say that AMD is shit and NVIDIA and INTEL rocks... because right now I think that of the 3, it's AMD that is pushing the developpement of the industry to advance the most

[Navin]

The article says that AMD has just now finalized the technology so that's why,

Principle engineer at Hynix says it will be introduced with new GPUs and we know for a fact that Maxwell will not have stacked DRAM, and we now know that AMD will have stacked DRAM on their upcoming architecture.

This means AMD will have stacked DRAM all to their selves in 2014 and 2015 until Volta shows up in 2016.

It's about execution..hope it's not like Hawaii where u have to sacrifice something (noise , temperature) to get a good gpu

[Mooshi]

I'd pick a better name. "HBM" doesn't sound all that appealing.