AMD zen based Opteron slides showcased in a debate at CERN

[Tomsen]

1 hour ago, patrickjp93 said:

AVX 512 means double the compute per clock, not to mention Intel's bringing the Cannonlake graphics engine to its Skylake E5 and E7 Xeons.

That is theoretical performance. Average high scaling might be around  ~70%.

A lot of HPC implementations see these high gains, because of their highly parallized workload, whereas others dont, perhaps because they are running a more complex workload, and the overhead of control on data might take to much of a toll on performance.

 

Are intel going to utilize the graphics engine for heterogeneous computing?

Now AMD already got plenty of experience from GPGPU market, but a company the size of Intel, it wont take long to catch up on the experience, if they decided to pursue it.

[MageTank]

2 hours ago, Tomsen said:

That will depend on how their building block is looking. I'm thinking 2 modules (8 cores) + 2 MC. Gives great modularity for scaling up or down in channels.

Doubt AVX512 is going to be a great concern, perhaps for few certain areas. Those areas can be filled up with HSA APUs.

Considering the market that Xeons and Opterons are in, AVX512 will make a huge difference. Though, I really do hope you are right on the IMC part (with each CPU subset of 8 cores having their own IMC) as it would help ease my doubts. It would also make a lot more sense than trying to brute force it with channel switching. Abandoning point to point at this point (ha, a pun) would be a terrible idea, considering it would make latency even worse on DDR4, which is already fighting an uphill battle against DDR3 in the latency department (You need highly clocked DDR4 to even get to DDR3 latency, and doing that on X99 is already difficult on its lackluster IMC).

 

Going the route you are suggesting though, could really be a good idea. It would also give me hope that the consumer grade Zen SKU's will have a powerful IMC, which would be a nice change of pace for AMD, given what we had with the previous FX series.

[Prysin]

27 minutes ago, MageTank said:

Considering the market that Xeons and Opterons are in, AVX512 will make a huge difference. Though, I really do hope you are right on the IMC part (with each CPU subset of 8 cores having their own IMC) as it would help ease my doubts. It would also make a lot more sense than trying to brute force it with channel switching. Abandoning point to point at this point (ha, a pun) would be a terrible idea, considering it would make latency even worse on DDR4, which is already fighting an uphill battle against DDR3 in the latency department (You need highly clocked DDR4 to even get to DDR3 latency, and doing that on X99 is already difficult on its lackluster IMC).

 

Going the route you are suggesting though, could really be a good idea. It would also give me hope that the consumer grade Zen SKU's will have a powerful IMC, which would be a nice change of pace for AMD, given what we had with the previous FX series.

FX IMC was just a marginally improved Phenom II IMC... and neither of these were anything to write home about.

Honestly, not so sure AMD would go with two IMCs per SKU. They have a history of fucking up perfectly fine ideas by "improving" them.

[Tomsen]

5 minutes ago, MageTank said:

Considering the market that Xeons and Opterons are in, AVX512 will make a huge difference. Though, I really do hope you are right on the IMC part (with each CPU subset of 8 cores having their own IMC) as it would help ease my doubts. It would also make a lot more sense than trying to brute force it with channel switching. Abandoning point to point at this point (ha, a pun) would be a terrible idea, considering it would make latency even worse on DDR4, which is already fighting an uphill battle against DDR3 in the latency department (You need highly clocked DDR4 to even get to DDR3 latency, and doing that on X99 is already difficult on its lackluster IMC).

 

Going the route you are suggesting though, could really be a good idea. It would also give me hope that the consumer grade Zen SKU's will have a powerful IMC, which would be a nice change of pace for AMD, given what we had with the previous FX series.

In lots of HPC areas, sure its going to make a huge difference, but few subsets don't. In general servers? Much less of a difference.

Well, I think we atleast can conclude that having a MC for each module was in AMD minds. From what we are hearing, AMD is going for a very modular architecture, not to be confused with CMT implementation in bulldozer and its iterations.

 

Most zen implementations are not going to be 8 channel, and consumers most likely are limited to 2, so I think the put some consideration in their MC.

[looncraz]

6 hours ago, linuxfan66 said:

I would make the argument that net burst laid far better groundwork than bulldozer ever did. Bulldozer never could be made that much better due to lack of ipc for sharing a key unit between two cores

 

I would make the exact opposite argument - as Core 2 Duo was a complete break from NetBurst and completely changed families, whereas Zen is using a significant portion of AMD's existing IP from the construction cores.

 

AMD's SMT implementation, for example, can be most simply implemented by directly using Bulldozer's front-end with barely any modifications (since it is already designed to handle two threads).  Bulldozer's ALUs and AGUs are actually very good (think about how well they did for only having two...) and most of the pipeline is quite capable and already designed to handle two threads and three schedulers.  NetBurst brought no such advantages for the Core family.

[Dabombinable]

7 hours ago, linuxfan66 said:

I would make the argument that net burst laid far better groundwork than bulldozer ever did. Bulldozer never could be made that much better due to lack of ipc for sharing a key unit between two cores

I'd agree with that, but Netburst from the get go was far worse in regards to IPC than any CPU made from the Pentium Pro onward. Bulldozer at least has far better IPC than that POS, also remember that Intel dropped Netburst for the very same reasons AMD is dropping CMT based CPU.

[Prysin]

17 minutes ago, Dabombinable said:

I'd agree with that, but Netburst from the get go was far worse in regards to IPC than any CPU made from the Pentium Pro onward. Bulldozer at least has far better IPC than that POS, also remember that Intel dropped Netburst for the very same reasons AMD is dropping CMT based CPU.

yup. Only difference is that intel had/has the money to drop CMT and go SMT right away, instead of being budget limited and having to keep going onwards with CMT until they could afford releasing SMT CPU

[Tomsen]

5 minutes ago, Prysin said:

yup. Only difference is that intel had/has the money to drop CMT and go SMT right away, instead of being budget limited and having to keep going onwards with CMT until they could afford releasing SMT CPU

That is not due to budget, but rather the time it take to make a ground new architecture. x86 microarchitecture (new ones, not iterations), are usually done over the course of 5 years to hit the market. That is why companies then do few iterations, which take significantly less time, in the meanwhile.

You could argue that AMD didn't have enough ressources to go for performance with steamroller and excavator meanwhile doing zen project.

Intel didn't scrap off netburst right away anyways.

[Dabombinable]

1 minute ago, Tomsen said:

That is not due to budget, but rather the time it take to make a ground new architecture. x86 microarchitecture (new ones, not iterations), are usually done over the course of 5 years to hit the market. That is why companies then do few iterations, which take significantly less time, in the meanwhile.

You could argue that AMD didn't have enough ressources to go for performance with steamroller and excavator meanwhile doing zen project.

Intel didn't scrap off netburst right away anyways.

No, but they kept on using P6 based CPU alongside Netburst as they were more efficient. At the same time Pentium 4 Northwood were around we had Pentium M that consumed a lot less power and had the same performance when clocked 1GHz lower, then we had Core Duo and Core 2 Duo/Quad at the same time (as in the 65nm versions-Netburst didn't make it to 45nm). AMD just stuck with the 1 new and bad architecture, instead of 1 old but good and 1 new but terrible.

[Prysin]

3 minutes ago, Dabombinable said:

No, but they kept on using P6 based CPU alongside Netburst as they were more efficient. At the same time Pentium 4 Northwood were around we had Pentium M that consumed a lot less power and had the same performance when clocked 1GHz lower, then we had Core Duo and Core 2 Duo/Quad at the same time (as in the 65nm versions-Netburst didn't make it to 45nm). AMD just stuck with the 1 new and bad architecture, instead of 1 old but good and 1 new but terrible.

the thing is. IPC wise, Bulldozer is about equal to Phenom II. Why? Because it had a slightly better IMC, reducing memory latency. It had higher clock speeds, so the marginally higher IPC of Phenom II was offset by said clock speed. Bulldozer simply achieved higher clock speeds, for equal or lower energy consumption.

The only thing Phenom II had over BUlldozer was better scaling. Superior scaling at that.

 

Ok, they didnt have equally clocked FX in the bench tool. So i went with Piledriver. Which has 7% higher single core performance then Bulldozer.

http://anandtech.com/bench/product/203?vs=1402

 

if a 3.2GHz Piledriver CPU is equal to a 3.3GHz Phenom II CPU AT LOWER TDPs. Then Phenom II is obsolete.

 

if you need more proof why Phenom is obsolete...

http://anandtech.com/show/5058/amds-opteron-interlagos-6200

 

It is not that Phenom is a bad product. It is just that despite all the issues YOU want Bulldozer to have, it is STILL equal or faster. Selling one product that is wastly outdated in terms of Instructions and features VS another similarily specced one is just stupid.

 

What AMD should have done is rebuilt their Phenom II cores for the APUs. Shrunk the node to 28nm, built a stronger IMC. Then used it in APUs... Because a quad core Phenom II would certainly be stronger then ANY steamroller alternative.

[Dabombinable]

8 minutes ago, Prysin said:

the thing is. IPC wise, Bulldozer is about equal to Phenom II. Why? Because it had a slightly better IMC, reducing memory latency. It had higher clock speeds, so the marginally higher IPC of Phenom II was offset by said clock speed. Bulldozer simply achieved higher clock speeds, for equal or lower energy consumption.

The only thing Phenom II had over BUlldozer was better scaling. Superior scaling at that.

 

Ok, they didnt have equally clocked FX in the bench tool. So i went with Piledriver. Which has 7% higher single core performance then Bulldozer.

http://anandtech.com/bench/product/203?vs=1402

 

if a 3.2GHz Piledriver CPU is equal to a 3.3GHz Phenom II CPU AT LOWER TDPs. Then Phenom II is obsolete.

 

if you need more proof why Phenom is obsolete...

http://anandtech.com/show/5058/amds-opteron-interlagos-6200

 

It is not that Phenom is a bad product. It is just that despite all the issues YOU want Bulldozer to have, it is STILL equal or faster. Selling one product that is wastly outdated in terms of Instructions and features VS another similarily specced one is just stupid.

 

What AMD should have done is rebuilt their Phenom II cores for the APUs. Shrunk the node to 28nm, built a stronger IMC. Then used it in APUs... Because a quad core Phenom II would certainly be stronger then ANY steamroller alternative.

Uh...no. Bulldozer didn't have a better IMC. That was proven when I compared the A8 4555m to this laptop's original Phenom II P920 and discovered that the A8 had its DDR3 1600 running with lower memory bandwidth and a slower transfer rate than the P920 with DDR3 1066. Also, its not issues that I want it to have, its issues that it does have.

[patrickjp93]

4 hours ago, Tomsen said:

That is theoretical performance. Average high scaling might be around  ~70%.

A lot of HPC implementations see these high gains, because of their highly parallized workload, whereas others dont, perhaps because they are running a more complex workload, and the overhead of control on data might take to much of a toll on performance.

 

Are intel going to utilize the graphics engine for heterogeneous computing?

Now AMD already got plenty of experience from GPGPU market, but a company the size of Intel, it wont take long to catch up on the experience, if they decided to pursue it.

Intel will be using GPGPU to add to their compute power, and they'll be integrating Altera FPGAs into Skylake E5/7. That's why AMD's HPC solutions are no silver bullet. And Intel has a decent amount of experience between developing the OpenMP offload solutions, using their Xeon Phi, and integrating custom solutions for customers before. And they already added a ton of Skylake driver code to Linux. They're prepared.

[looncraz]

7 hours ago, Prysin said:

Ok, they didnt have equally clocked FX in the bench tool. So i went with Piledriver. Which has 7% higher single core performance then Bulldozer.

http://anandtech.com/bench/product/203?vs=1402

 

I've done an incredible amount of work comparing generational performance - and Phenom II has higher IPC than Bulldozer - by quite a lot, in fact.

 

You are comparing a 4GHz CPU to a 3.3GHz CPU - and they just about break even... you forget that FX has turbo, and Phenom II does not (you are also comparing Piledriver - not Bulldozer....).

 

If Bulldozer had the same IPC as Phenom II and the clockrates it pushed, it would not have been deemed a failure at all as it would have given AMD lower power draw, more cores, and more performance all in one go.  Piledriver still had lower IPC, with parity not even happening with Steamroller (though it got closer).  Excavator, however, has higher IPC than Phenom II, finally, and is quite similar to Penryn (Core 2).

 

I do agree, though, that Bulldozer's IMC was much better than Phenom II's.  Having owned both, and done extensive testing, that was one of Bulldozer's best attributes (good luck running high speed DDR3 with phenom II).

[AlTech]

On ‎2‎/‎10‎/‎2016 at 10:35 PM, don_svetlio said:

I'm actually surprised why LMG haven't done anything regarding the Wraith cooler seeing as many outlets are calling it "the best reference cooler ever made"

We all know that @LinusTech and @Slick are biased towards Intel.

[D-Dos Dan]

13 hours ago, dalekphalm said:

32-bit architecture and core count really don't have much to do with each other...

 

Not to mention, we've been on 64-bit Operating Systems for what... 10 years? Windows XP x64 Edition was released just under 11 years ago.

 

The "bit" refers to memory addressing. The main benefit of going 64-bit is that you can address much higher amounts of physical memory.

I was joking haha, there's always someone who takes it seriously  

[Prysin]

 

@looncraz
if you had read my post, you would see that i DID indeed state that i couldnt find a equally clocked Bulldozer CPU, and that i did state that Piledriver has 7% single core advantage over Bulldozer. These are known numbers so let us not dwell on those.
Anandtechs benchmarks (all of them, including reviews too it seems) are done ithout turbo. The reason is that they seem to want to eliminate inconsistencies such as some workloads not triggering turbo, while others will.

Phenom II had Turbo 1.0, which alowed it to turbo only HALF the cores, a similar system is used with the Steamroller APUs when the iGPU is in use.
FX has Turbo 2.0, which allows it to turbo ALL the cores, if thermals allow it to doso.

Phenom II IPC increase isnt that much higher, around 10-15%, however IMC is better. While @Dabombinable claims otherwise, however his example doesnt explain IMC issues. What he claims to be IMC issues seems to be clearly memory and bios. OEMs notoriously uses shit RAM. I bet his A8 had single channel and BIOS not actually letting it run at max speed (or worse, throttling due to shitty chassis design) and the Phenom was probably running dual channel. IMC cannot affect bandwidth without either using a lower generation DDR or by having fewer sticks. It really is simpl.e DDR3 = 64bit bus per channel/stick. Bandwidth = Bus width x memory speed.

Anyway, back to you @looncraz
Bulldozer had a few improvements other then clock speeds and IMC. From what i know, they improved L3 Cache speeds or latency, which would affect testing. L2 was unchanged or slower. Havent seen or heard of any tests on L1 speeds.
Hypertransport is also faster in BUlldozer, thanks to the improved 900 chipset. Which beside adding a few more PCIeGen2 lanes and USB2.0 ports didnt introduce much else over the 800 chipset.

I will say though, what worries me is that rumors state AMD will use some of the cache parts from Excavator, however Excavator, like BUlldozer, isnt really great when it comes to cache speed and latency...This could be a issue.
 

 

 

[Tomsen]

13 hours ago, Dabombinable said:

No, but they kept on using P6 based CPU alongside Netburst as they were more efficient. At the same time Pentium 4 Northwood were around we had Pentium M that consumed a lot less power and had the same performance when clocked 1GHz lower, then we had Core Duo and Core 2 Duo/Quad at the same time (as in the 65nm versions-Netburst didn't make it to 45nm). AMD just stuck with the 1 new and bad architecture, instead of 1 old but good and 1 new but terrible.

And AMD have had the bobcat family alongside. You know, the microarchitecture implemented in all those console deals..

 

12 hours ago, patrickjp93 said:

Intel will be using GPGPU to add to their compute power, and they'll be integrating Altera FPGAs into Skylake E5/7. That's why AMD's HPC solutions are no silver bullet. And Intel has a decent amount of experience between developing the OpenMP offload solutions, using their Xeon Phi, and integrating custom solutions for customers before. And they already added a ton of Skylake driver code to Linux. They're prepared.

AMD have also been looking into integrating FPGAs into HPC APUs.

Yeah, but they have zero experience in actually doing GPGPU computing on GPU hardware.

They maybe are prepared to launch, but still don't have the experience you are getting, of actually having a product out for users, and receiving input from said users.

[patrickjp93]

46 minutes ago, Tomsen said:

And AMD have had the bobcat family alongside. You know, the microarchitecture implemented in all those console deals..

 

AMD have also been looking into integrating FPGAs into HPC APUs.

Yeah, but they have zero experience in actually doing GPGPU computing on GPU hardware.

They maybe are prepared to launch, but still don't have the experience you are getting, of actually having a product out for users, and receiving input from said users.

Not true. They've done iGPU SKUs for big customers like Google before, and they've had compute-capable iGPUs since Ivy Bridge.

[BuckGup]

On 2/10/2016 at 8:22 AM, don_svetlio said:

32 cores? That's quite the amount for a single CPU

Probably 4 cores for CPU and 28 for GPU. 

[Coaxialgamer]

On 10/2/2016 at 5:36 PM, zMeul said:

I might be looking at this wrong, but looks like they will split the cores in packages - basically having multi CPUs on the same die

didn't Intel do a similar thing with the 1st gen Core i ?! or was it earlier in Core DUO

pretty sure that was the core 2 quad

[Trixanity]

10 minutes ago, SamStrecker said:

Probably 4 cores for CPU and 28 for GPU. 

Highly unlikely when it's for servers. That would otherwise be a huge regression in core count. Also, Zen is in fact expected to scale up to 32 cores one way or the other and not "compute cores" as used in APU marketing where 12 compute cores is 4 CPU cores and 8 GPU cores. 

[BuckGup]

20 minutes ago, Trixanity said:

Highly unlikely when it's for servers. That would otherwise be a huge regression in core count. Also, Zen is in fact expected to scale up to 32 cores one way or the other and not "compute cores" as used in APU marketing where 12 compute cores is 4 CPU cores and 8 GPU cores. 

It was a joke...

[dalekphalm]

7 hours ago, D-Dos Dan said:

I was joking haha, there's always someone who takes it seriously  

You know the rules - use /s or :P, or it'll be taken as a serious post

4 hours ago, valdyrgramr said:

I have a feeling this Opteron is going to cost more than a titan x.

The 32-core SKU? Hell yeah - that thing will probably be $2500 or more.

43 minutes ago, SamStrecker said:

Probably 4 cores for CPU and 28 for GPU. 

hahaha...

 

Because THAT joke isn't old

[patrickjp93]

4 hours ago, valdyrgramr said:

I have a feeling this Opteron is going to cost more than a titan x.

Look at the highest price of an E5 Xeon. That will be the approximate cost.

[looncraz]

6 hours ago, Prysin said:

 

@looncraz
Anandtechs benchmarks (all of them, including reviews too it seems) are done ithout turbo. The reason is that they seem to want to eliminate inconsistencies such as some workloads not triggering turbo, while others will.

Phenom II had Turbo 1.0, which alowed it to turbo only HALF the cores, a similar system is used with the Steamroller APUs when the iGPU is in use.
FX has Turbo 2.0, which allows it to turbo ALL the cores, if thermals allow it to doso.

Phenom II IPC increase isnt that much higher, around 10-15%, however IMC is better. While @Dabombinable claims otherwise, however his example doesnt explain IMC issues. What he claims to be IMC issues seems to be clearly memory and bios. OEMs notoriously uses shit RAM. I bet his A8 had single channel and BIOS not actually letting it run at max speed (or worse, throttling due to shitty chassis design) and the Phenom was probably running dual channel. IMC cannot affect bandwidth without either using a lower generation DDR or by having fewer sticks. It really is simpl.e DDR3 = 64bit bus per channel/stick. Bandwidth = Bus width x memory speed.

Anyway, back to you @looncraz
Bulldozer had a few improvements other then clock speeds and IMC. From what i know, they improved L3 Cache speeds or latency, which would affect testing. L2 was unchanged or slower. Havent seen or heard of any tests on L1 speeds.
Hypertransport is also faster in BUlldozer, thanks to the improved 900 chipset. Which beside adding a few more PCIeGen2 lanes and USB2.0 ports didnt introduce much else over the 800 chipset.

I will say though, what worries me is that rumors state AMD will use some of the cache parts from Excavator, however Excavator, like BUlldozer, isnt really great when it comes to cache speed and latency...This could be a issue.
 

 

 

Anandtech's database numbers are always done with Turbo enabled, that's where you're messing up.  The database is for comparing stock performance - which includes turbo.  I've used their database for years to compare with other numbers. May of their articles will disable turbo to compare core to core or generational improvements, but they don't put those results in the database.  You are right, though, that the phenom II X6 has Turbo (3.7GHz) that I didn't take into account... however, there are plentiful direct comparisons between Phenom II and Bulldozer clock-for-clock, no turbo, already done for us...

 

http://www.anandtech.com/show/5057/the-bulldozer-aftermath-delving-even-deeper/9

 

Direct IPC comparison (Opteron 6174 vs 6276).  There's no comparison, Bulldozer is woefully slow.

 

http://www.pcper.com/reviews/Processors/AMD-FX-Processor-Review-Can-Bulldozer-Unearth-AMD-Victory/FX-versus-Phenom-Perf-0

 

Direct IPC comparison #2.

 

FX-8150 1C: 700.7

Phenom II 1C: 835.5

 

Now, for some simple math fun:

 

700 * 1.1

Piledriver: 770

770 * 1.067

Steamroller: 821.59

821.59 * 1.0985

Excavator: 902.52

 

Which, while just one benchmark, does fully match what I said.

 

http://www.tomshardware.com/reviews/piledriver-k10-cpu-overclocking,3584-7.html

 

Here we see that it takes ~4GHz Piledriver to match a 3GHz Athlon II X4 640.