AMD unveils new Radeon Pro Card

[cj09beira]

14 hours ago, OrbitalBuzzsaw said:

Neat, but get back to me when they have something that performs north of the 1080 Ti for a reasonable price

in rendering and other pro apps vega already does that 

11 hours ago, schwellmo92 said:

That HBM2 was 1.6Gbps product from Hynix, that’s why it was implemented at 1.89Gbps not 2Gbps..

that 1.6 gbps hbm chip was supposed to clock to 2 Gbps but something went wrong, which didnt help vegas's performance

[GOTSpectrum]

1 minute ago, cj09beira said:

in rendering and other pro apps vega already does that 

that 1.6 gbps hbm chip was supposed to clock to 2 Gbps but something went wrong, which didnt help vegas's performance

I like the fact that people look at gaming performance and think that is the be all and end all. They do the same with CPUs too.

 

Im guessing HBM was what help Vega back tbh. If it release when it was meant to I feel like it would have had much more respect from the general public. 

[cj09beira]

2 minutes ago, Ben Quigley said:

I like the fact that people look at gaming performance and think that is the be all and end all. They do the same with CPUs too.

 

Im guessing HBM was what help Vega back tbh. If it release when it was meant to I feel like it would have had much more respect from the general public. 

the extra memory performance would mean that they could have dialed the power back quite a bit and still have the same performance or have the same power consumption and compete better with the 1080, though time did more damage, they should have had it out much sooner (i would sue sk hynix for damages)

[Trixanity]

2 minutes ago, Ben Quigley said:

I like the fact that people look at gaming performance and think that is the be all and end all. They do the same with CPUs too.

 

Im guessing HBM was what help Vega back tbh. If it release when it was meant to I feel like it would have had much more respect from the general public. 

One problem is that Nvidia has (if I recall correctly) a lot better memory compression so the effective memory bandwidth is so much higher. So Nvidia doesn't really suffer from bandwidth problems on their higher end products or at least they're quite small in comparison to AMD's problems. HBM is one way to help but it shouldn't be the only solution employed. AMD does have memory compression but it isn't as good.

 

And we're seeing now that GDDR6 has overtaken HBM2 unless you employ at least 2 stacks vs a 256-bit memory bus or 3 stacks against a 384-bit bus. That is at 2 Gbps. At 2.4 Gbps you could use 2 stacks and get reasonably close to a GDDR6 384-bit bus (like 50 GB/s off if my calculations are correct). Those GDDR6 numbers are based on 14 Gb/s GDDR6 memory.

 

And then we've got pricing and complexity to worry about. HBM isn't likely to go mainstream anytime soon.

 

The TL;DR is HBM is good but very expensive and GDDR is catching up and will still see much widespread use. Also, memory technology isn't everything.

[schwellmo92]

16 minutes ago, cj09beira said:

in rendering and other pro apps vega already does that 

that 1.6 gbps hbm chip was supposed to clock to 2 Gbps but something went wrong, which didnt help vegas's performance

SK Hynix were supposed to have a 1.6Gbps 1.2v and 2Gbps 1.2v HBM2 product ready in time but they only had the 1.6Gbps 1.2v version ready, which is why on the 1.89Gbps Vega 64 the HBM2 voltage is 1.35v because they had to overclock it to try get as much of the bandwidth as they were expecting.

[GOTSpectrum]

11 minutes ago, cj09beira said:

the extra memory performance would mean that they could have dialed the power back quite a bit and still have the same performance or have the same power consumption and compete better with the 1080, though time did more damage, they should have had it out much sooner (i would sue sk hynix for damages)

Definatly, But we dont know exactly what AMD were promised tbh, but if SK caused the delay and they agreed on a set date or performance then I would consider it tbh.

 

2 minutes ago, Trixanity said:

One problem is that Nvidia has (if I recall correctly) a lot better memory compression so the effective memory bandwidth is so much higher. So Nvidia doesn't really suffer from bandwidth problems on their higher end products or at least they're quite small in comparison to AMD's problems. HBM is one way to help but it shouldn't be the only solution employed. AMD does have memory compression but it isn't as good.

 

And we're seeing now that GDDR6 has overtaken HBM2 unless you employ at least 2 stacks vs a 256-bit memory bus or 3 stacks against a 384-bit bus. That is at 2 Gbps. At 2.4 Gbps you could use 2 stacks and get reasonably close to a GDDR6 384-bit bus (like 50 GB/s off if my calculations are correct). Those GDDR6 numbers are based on 14 Gb/s GDDR6 memory.

 

And then we've got pricing and complexity to worry about. HBM isn't likely to go mainstream anytime soon.

 

The TL;DR is HBM is good but very expensive and GDDR is catching up and will still see much widespread use. Also, memory technology isn't everything.

Man, HBM is already mainstream to some degree thanks to vega and the intel NUCs. Also, HBM3 will be interesting if they can get it sorted soon enough, We just have to wait to see if they can get the promised performance out of the silicon. The truth is the only reason HBM was used on vega was power, we all already know this. 

[schwellmo92]

3 minutes ago, Trixanity said:

One problem is that Nvidia has (if I recall correctly) a lot better memory compression so the effective memory bandwidth is so much higher. So Nvidia doesn't really suffer from bandwidth problems on their higher end products or at least they're quite small in comparison to AMD's problems. HBM is one way to help but it shouldn't be the only solution employed. AMD does have memory compression but it isn't as good.

 

And we're seeing now that GDDR6 has overtaken HBM2 unless you employ at least 2 stacks vs a 256-bit memory bus or 3 stacks against a 384-bit bus. That is at 2 Gbps. At 2.4 Gbps you could use 2 stacks and get reasonably close to a GDDR6 384-bit bus (like 50 GB/s off if my calculations are correct). Those GDDR6 numbers are based on 14 Gb/s GDDR6 memory.

 

And then we've got pricing and complexity to worry about. HBM isn't likely to go mainstream anytime soon.

 

The TL;DR is HBM is good but very expensive and GDDR is catching up and will still see much widespread use. Also, memory technology isn't everything.

12x1GB 14Gbps GDDR6 = 672GB/s

3x4GB 2.4Gbps HBM2 = 921GB/s

[cj09beira]

2 minutes ago, Trixanity said:

One problem is that Nvidia has (if I recall correctly) a lot better memory compression so the effective memory bandwidth is so much higher. So Nvidia doesn't really suffer from bandwidth problems on their higher end products or at least they're quite small in comparison to AMD's problems. HBM is one way to help but it shouldn't be the only solution employed. AMD does have memory compression but it isn't as good.

 

And we're seeing now that GDDR6 has overtaken HBM2 unless you employ at least 2 stacks vs a 256-bit memory bus or 3 stacks against a 384-bit bus. That is at 2 Gbps. At 2.4 Gbps you could use 2 stacks and get reasonably close to a GDDR6 384-bit bus (like 50 GB/s off if my calculations are correct). Those GDDR6 numbers are based on 14 Gb/s GDDR6 memory.

 

And then we've got pricing and complexity to worry about. HBM isn't likely to go mainstream anytime soon.

 

The TL;DR is HBM is good but very expensive and GDDR is catching up and will still see much widespread use. Also, memory technology isn't everything.

not for long though, new interposer tech means that packaging costs are about to plummet (emib and amd has filled a similar patent too) which will help a lot with hbm adoption, about memory compression, i have a feeling that amd get good money from using their gpus in medical machinery so they might be limited in the types of compression they can do while nvidea can stand to loose some accuracy 

 

3 minutes ago, Ben Quigley said:

Definatly, But we dont know exactly what AMD were promised tbh, but if SK caused the delay and they agreed on a set date or performance then I would consider it tbh.

 

Man, HBM is already mainstream to some degree thanks to vega and the intel NUCs. Also, HBM3 will be interesting if they can get it sorted soon enough, We just have to wait to see if they can get the promised performance out of the silicon. The truth is the only reason HBM was used on vega was power, we all already know this. 

it wasn't the only reason by a long shot the thing is that many things went wrong that they could not have foreseen (multiple hbm delays, vega itself not clocking as high as they wanted and hbm prices increased a lot too) when vega was being projected hbm meant better bandwidth, better form factor simpler cooling solution, lower power, for a slightly higher cost, but sometimes luck is not on your side

[Taf the Ghost]

1 minute ago, cj09beira said:

not for long though, new interposer tech means that packaging costs are about to plummet (emib and amd has filled a similar patent too) which will help a lot with hbm adoption, about memory compression, i have a feeling that amd get good money from using their gpus in medical machinery so they might be limited in the types of compression they can do while nvidea can stand to loose some accuracy 

 

it wasn't the only reason by a long shot the thing is that many things went wrong that they could not have foreseen (multiple hbm delays, vega itself not clocking as high as they wanted and hbm prices increased a lot too) when vega was being projected hbm meant better bandwidth, better form factor simpler cooling solution, lower power, for a slightly higher cost, but sometimes luck is not on your side

AMD might have ended up with closer to 3x the cost of HBM than they expected, partially because it turned out really good for HPC tasks. Thus, Nvidia wants it as well.

 

Related to that, but AMD is like the kings of a huge chunk of Embedded video devices. Little things you forget about because you never see it around.

[cj09beira]

@Taf the Ghost any idea when we might see hbm 3 coming to market, we had that old rambus leak with vague projections but nothing since, then it had the ETA in 2018/2019 but to me that seems to early and we just got 2.4 gbps hbm, so maybe late 2019 / 2020, ? 

anyway when it arrives everything should be ready for bigger market penetration as we should have emib (amd version included) ready as well as a better understanding of its potential demand which should help keep prices down.

they did say it would be made on 7nm so it might launch when 7nm has less demand

[Taf the Ghost]

Just now, cj09beira said:

@Taf the Ghost any idea when we might see hbm 3 coming to market, we had that old rambus leak with vague projections but nothing since, then it had the ETA in 2018/2019 but to me that seems to early and we just got 2.4 gbps hbm, so maybe late 2019 / 2020, ? 

anyway when it arrives everything should be ready for bigger market penetration as we should have emib (amd version included) ready as well as a better understanding of its potential demand which should help keep prices down.

they did say it would be made on 7nm so it might launch when 7nm has less demand

Without patent diving, I haven't heard anything about HBM3. AMD is deep into DDR5 right now, since they're actually one of the bigger memory design players. (Which is still weird how their CPU side of things has always lagged for memory system work. Granted, the GPU side has tended to have amazing memory control systems.)

 

DDR5 is probably 2020 before it really kicks up, and that's on 7nm. HBM3 will also be Factory 7nm, and memory is normally pretty late in a process node's life. Real question is if they have to wait for EUV to really get the numbers. Given that time frame, I imagine the post-Navi AMD Compute designs would be the first place we'd see it.

[GOTSpectrum]

Just now, Taf the Ghost said:

Without patent diving, I haven't heard anything about HBM3. AMD is deep into DDR5 right now, since they're actually one of the bigger memory design players. (Which is still weird how their CPU side of things has always lagged for memory system work. Granted, the GPU side has tended to have amazing memory control systems.)

 

DDR5 is probably 2020 before it really kicks up, and that's on 7nm. HBM3 will also be Factory 7nm, and memory is normally pretty late in a process node's life. Real question is if they have to wait for EUV to really get the numbers. Given that time frame, I imagine the post-Navi AMD Compute designs would be the first place we'd see it.

https://arstechnica.com/gadgets/2016/08/hbm3-details-price-bandwidth/

 

This is from a while ago which is why i said if it holds up to what people say. 

[Taf the Ghost]

7 minutes ago, Ben Quigley said:

https://arstechnica.com/gadgets/2016/08/hbm3-details-price-bandwidth/

 

This is from a while ago which is why i said if it holds up to what people say. 

 

16 minutes ago, cj09beira said:

@Taf the Ghost any idea when we might see hbm 3 coming to market, we had that old rambus leak with vague projections but nothing since, then it had the ETA in 2018/2019 but to me that seems to early and we just got 2.4 gbps hbm, so maybe late 2019 / 2020, ? 

anyway when it arrives everything should be ready for bigger market penetration as we should have emib (amd version included) ready as well as a better understanding of its potential demand which should help keep prices down.

they did say it would be made on 7nm so it might launch when 7nm has less demand

I'm looking, but there doesn't seem to have been much beyond HBM2 to crop up in the memory device space on the 16/14/12nm nodes. Interesting. Samsung's GDDR6 is on their 10nm node, which is a low-power 14nm node with tighter SRAM spacing. So I guess I found what I was missing.

[cj09beira]

11 minutes ago, Taf the Ghost said:

 

I'm looking, but there doesn't seem to have been much beyond HBM2 to crop up in the memory device space on the 16/14/12nm nodes. Interesting. Samsung's GDDR6 is on their 10nm node, which is a low-power 14nm node with tighter SRAM spacing. So I guess I found what I was missing.

that means it will be a while before we see it, oh well 

[Taf the Ghost]

Just now, cj09beira said:

that means it will be a while before we see it, oh well 

Samsung's 8nm/7nm will be somewhere in 2019, so they won't start producing memory until 2020 more than likely. The industry's DDR5 timeline seems to be on track still, but there's a real question when any major platform will add it.  Tigerlake should be taping out soon, so it won't be there for Intel. So I guess when we got to Ocean Cove, which is 2021 for Desktop. Must be Sapphire Rapids for Intel's server side, which is late 2020 for the earliest delivers. 

 

Yeah, DDR5 looks to be 2021. We've gotten some differential roadmaps from AMD. It's either a Zen2+ or Zen3 that comes after Rome. 

 

Oh, that's what is going on with AMD. Their Servers are going to be full generations, but their Desktop will get half-gen improvement cycles. That explains some of the mismatches that seem to crop up in their Roadmap. "Milan" will be Zen3 with DDR5, whenever they get it out on 7nm+. 

[Taf the Ghost]

@cj09beira

 

It's kind of funny what you can figure out with a few roadmaps and a little thought about the nodes.

[Taf the Ghost]

@leadeater

 

I think I just inadvertently figured out the next 3 years of x86 CPU roadmaps, lol.

[cj09beira]

1 minute ago, Taf the Ghost said:

Samsung's 8nm/7nm will be somewhere in 2019, so they won't start producing memory until 2020 more than likely. The industry's DDR5 timeline seems to be on track still, but there's a real question when any major platform will add it.  Tigerlake should be taping out soon, so it won't be there for Intel. So I guess when we got to Ocean Cove, which is 2021 for Desktop. Must be Sapphire Rapids for Intel's server side, which is late 2020 for the earliest delivers. 

 

Yeah, DDR5 looks to be 2021. We've gotten some differential roadmaps from AMD. It's either a Zen2+ or Zen3 that comes after Rome. 

 

Oh, that's what is going on with AMD. Their Servers are going to be full generations, but their Desktop will get half-gen improvement cycles. That explains some of the mismatches that seem to crop up in their Roadmap. "Milan" will be Zen3 with DDR5, whenever they get it out on 7nm+. 

i had noticed it too, and it makes a bunch of sense, this way they can have a gen where they can get wild , and due to their limited budget it means they dont have to to trough the whole process of certifying the cpu for serve use every year, it will also look better in the slides as the improvements will be compounded

 

Just now, Taf the Ghost said:

@cj09beira

 

It's kind of funny what you can figure out with a few roadmaps and a little thought about the nodes.

it is, isn't it , its a bit how i did my exams in high school: hm so i need a speed at the end and i only got a distance and a length of time, (saved so many times because i had forgotten part of an equation )

[Taf the Ghost]

17 minutes ago, cj09beira said:

i had noticed it too, and it makes a bunch of sense, this way they can have a gen where they can get wild , and due to their limited budget it means they dont have to to trough the whole process of certifying the cpu for serve use every year, it will also look better in the slides as the improvements will be compounded

 

it is, isn't it , its a bit how i did my exams in high school: hm so i need a speed at the end and i only got a distance and a length of time, (saved so many times because i had forgotten part of an equation )

I think at some level, even Intel almost wastes money by the way Server generations come out, but part of that comes down to the issues with node delays lately.

[Trixanity]

2 hours ago, cj09beira said:

not for long though, new interposer tech means that packaging costs are about to plummet (emib and amd has filled a similar patent too) which will help a lot with hbm adoption, about memory compression, i have a feeling that amd get good money from using their gpus in medical machinery so they might be limited in the types of compression they can do while nvidea can stand to loose some accuracy 

 

it wasn't the only reason by a long shot the thing is that many things went wrong that they could not have foreseen (multiple hbm delays, vega itself not clocking as high as they wanted and hbm prices increased a lot too) when vega was being projected hbm meant better bandwidth, better form factor simpler cooling solution, lower power, for a slightly higher cost, but sometimes luck is not on your side

Memory compression is necessary when you're bandwidth starved though. If we assume AMD can't do more than they do already due to losses in accuracy then I would expect them to get on it when they split their consumer and compute cards. It'll be unlikely to see a plateau in memory bandwidth requirements so they'll have to do it sooner or later. I don't think memory technology will advance fast enough to compensate. HBM hasn't been enough so far unless they can cheaply put 3 or 4 stacks on a card within a year or two. I still find it an inelegant solution to brute force the problem.

 

Can you link the AMD patent? Or an article on it? I've only seen AMD saying that interposers is what they're betting on for now and they're working with partners to improve it. It's necessary to get there though. I think everyone has realized that it's the way forward.

 

While AMD has been unlucky, their business decisions have been abysmal and their technological direction has been asinine until recently and they still haven't revealed how they expect to turn the GPU business around. That's the big question mark while Nvidia is chugging along as usual and Intel has seemingly declared their intention to steal AMD's place if not more than that.