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pci-e usb 3.0 risers. how do they work?

hey ,everyone 

usb 3.0 has only 9 pins while pci-e 1x uses 36 pins i've heard 18 are used for power that's still 9 missing pins and i don't see any logic on the pcie 1x side of the riser.

so i was wondering how do they send all the info that's required to run pcie cards?

 

thanks in advance

 

here's a photo of the kinds of risers i'm talking about: PCI-E-USB-Riser-with-6-pin.jpg

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it makes sense if i interpret this diagram correctly... 

image.png.647bbe0d2eccfd0588f4459546a10deb.png

 

AFAIK, the power lines at the front end are not passed thru to the slot of the riser and there is not a whole lot going on at the tail end of the connector.

 

RSVD can probably be skipped and you only need one GND - the PRSNT pins can (must?) be shortet to make the system detect that the slot is occupied by something.

 

that leaves the three differential pairs REFCLK, HSOp and HSIp - those are the important lines that transfer data. 

 

edit: you may also need SMCLK and SMDAT from the connectors front end as well - not sure about the JTAG lines

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The usb 3 cable is only used for data, not for power.

There's 3 differential pairs, 1 ground, and maybe the SM Bus required... 3.3v is produced from 12v on the board, jtag is optional, hotplug detect is tied to ground or something like that  etc... so they can do it with around 8-9 wires.

 

 

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On 5/4/2018 at 9:48 AM, ninjaponey said:

hey ,everyone 

usb 3.0 has only 9 pins while pci-e 1x uses 36 pins i've heard 18 are used for power that's still 9 missing pins and i don't see any logic on the pcie 1x side of the riser.

so i was wondering how do they send all the info that's required to run pcie cards?

 

thanks in advance

 

here's a photo of the kinds of risers i'm talking about:

Just a bit of backup info: https://en.wikipedia.org/wiki/PCI_Express#Pinout

 

In any case, there's only 7 pins (4 data, 2 clock, 1 ground) that need to travel from the host to the device. The rest are power, unnecessary, or can be faked on the riser.

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