Is inflated/fake TBW a real thing?

[h4lf_gr33k]

I have three (3) SSDs on hand. All of them 2,5" SATA.

1 is a 240 GB WD Green with SanDisk TLC NAND and 40 TBW of endurance.

2 is a 220 GB GS Nanotech (a Russian manufacturer) with Micron MLC NAND and 380 TBW of endurance.

3 is a 256 GB mSTORE (another Russian manufacturer) with Micron TLC NAND and 500 TBW of endurance.

 

I was wondering — how is it possible for such a huge disparity in endurance to exist, and how come a TLC SSD has 1.3 times the TBW of a MLC drive?

Could the endurance rating be fake/inflated?

 

Linux Hardware probe with all of them (GS Nanotech's model number is GSTOR256R08STF — not present in the hw probe)

[mariushm]

MLC has much higher endurance than TLC ... something like 5000 to 8000-10000 erases. TLC has fewer erases, something like 3000 to 6000 was common if my memory is correct.

 

Older SSD controllers could only use a portion of the Flash memory in pseudo-SLC mode - basically the empty flash memory is converted from TLC into SLC so instead of storing 3 bits into each cell, only one bit is written. The memory in this SLC mode is more tolerant to erases, think of it like 10-15k erases instead of 3-6k erases when in SLC mode. As this SLC area is filled up, the controller takes the data and writes it in background into TLC memory area. Temporary stuff is never written, because the controller only moves the data later, when the system is idle.

 

The WD Green may use lower bin of Toshiba / Sandisk flash chips, the "standard" quality bin of flash chips they use in WD Blue and Black (SN770 etc), so these chips have a slightly lower endurance, though it's not officially listed. The controller probably has no ability to create SLC memory, or if it does it's very low amount, like 10-20 GB. 

 

The noname mStore may have a newer controller that can convert the whole TLC memory into pseudo-SLC so you basically will have around 80 GB of slc write cache.

So they're assuming this feature will extend the life of the memory, and therefore they may estimate a high number.  It could be a bit inflated, but 300-400 TBW would not be impossible.

 

[h4lf_gr33k]

4 minutes ago, mariushm said:

The noname mStore may have a newer controller that can convert the whole TLC memory into pseudo-SLC so you basically will have around 80 GB of slc write cache.

 

I guess I should have mentioned the controller beforehand — it's a Maxio MAS1102B-B1C. I wouldn't know how new it is or whether it has these features you mentioned. There is also only one NAND chip on the PCB.

[mariushm]

That controller has the ability to use pSLC , for example the Patriot Burst 1.92 TB with asian QLC nand can create up to 480 GB of pSLC memory (around 1.6 TB of QLC converted to SLC)  : https://www.techpowerup.com/ssd-specs/patriot-burst-elite-1-9-tb.d1851

 

But 500 TBW is indeed inflated ... like I said, I'd expect at most 300 TBW or thereabouts.

[dizmo]

I wouldn't be too worried about it TBH. Most SSDs will go far, far beyond the rated drive endurance.

I believe it's more of a warranty thing. They tested x number of drives, all lasted within that time, so that's the rating they'll give them so that they don't have to file as many warranty claims.

[kokosnh]

I would like to add, that TBW is calculated with ECC, like BCH and LDPC error correction algorithms. Not pure P/E of NAND cells.

 

the same 32l TLC micron nand, have 500P/E cycles in BCH ecc codes, and 1500P/E cycles in LDPC ecc codes. 
 

https://media-www.micron.com/-/media/client/global/documents/products/product-flyer/3d_nand_flyer.pdf

 

https://media-www.micron.com/-/media/client/global/documents/products/product-flyer/3d_nand_flyer.pdf

 

[porina]

Might be worth expressing them as effective cycle life? Divide endurance by capacity. Normally this scales with the drive capacity. Note these effective cycles aren't just the flash cycle life, but can include other factors like overprovisioning.

 

WD Green 167 cycles

GS Nanotech 1727 cycles

mSTORE 1953 cycles

 

For comparison, Samsung 980 Pro is 150 TBW for the 250GB model using Samsung TLC. Effective cycle life is 600 using the same method. I picked this SSD for comparison since it was a high end model at launch and was popular regardless.

[porina]

29 minutes ago, kokosnh said:

the same 32l TLC micron nand, have 500P/E cycles in BCH ecc codes, and 1500P/E cycles in LDPC ecc codes. 

I hadn't come across that before. The obvious question then is, if LDPC is so great, why wouldn't you use it as standard? In a quick look at the two error correction schemes, it does look like LDPC is more computationally expensive. Maybe there are other tradeoffs outside of that too. Still, its existence makes the claims of OP's SSDs more viable if you add in some extra factor for overprovisioning.

[kokosnh]

1 hour ago, porina said:

I hadn't come across that before. The obvious question then is, if LDPC is so great, why wouldn't you use it as standard? In a quick look at the two error correction schemes, it does look like LDPC is more computationally expensive. Maybe there are other tradeoffs outside of that too. Still, its existence makes the claims of OP's SSDs more viable if you add in some extra factor for overprovisioning.

They just didn't have to with MLC,

the first Samsung 3D NAND 40nm MLC Samsung 850 pro was on BCH, and it still outlived other MLC SSD that had, LDPC.  
some other early 2D MLC SSD, didn't even have any ecc.

 

and yes, it’s more computing intensive, and the controllers have to support it, and it do take space. 

 

nowadays, you can't really go far without LDPC, as the TLC and QLC nand has less P/E cycles, so they just push larger LDPC error correction codes, to compensate. up to 4KB codeword LDPC.

of course data retention is also a factor, TLC witch BCH ecc is usually bad idea ( Samsung got the note with 840 series )

 

and yes, TBW is also dependent on capacity, but that’s a given, more NAND, more life, bigger is better, and faster.

[NewMaxx]

TBW is arbitrary and largely meaningless. Current TLC is rated for around 3,000 cycles, although there is variance from 700 (media grade) to 5,000 (best RG) or 10,000 (industrial/commercial grade). SLC mode will be 60,000 to 100,000 for consumer, 250,000 or more in some cases. QLC is at around 1,500. TBW will usually hit a mark far below these values, but it's also within the warranty period (which is more important). TBW also is supposed to refer to NAND writes rather than host so accounts for write amplification, and WA can vary based on many factors.

 

"The obvious question then is, if LDPC is so great, why wouldn't you use it as standard?"

 

You answered this yourself right after: it's more computationally expensive to use soft decoding. Soft decoding can require more power, needs more die space for the ECC engine, needs more NAND space for spare corrective code, and can be less efficient (uses more power, produces more heat). Also, it does increase latency (if you are hitting enough decoding steps). Luckily, it's usually not needed in the early lifetime of drives, in fact I would expect more consumer drives don't see enough wear for this to matter much.

 

As a side note on MLC: some 3D TLC has better endurance than some 2D MLC. Small process MLC with BCH was actually worse than Samsung's initial V-NAND TLC generations. Samsung's last 2D MLC was around 10,000 cycles while their early V-NAND was 20,000 to 30,000 for 3-bit MLC (TLC). 3D NAND is in a much larger effective node with a structure that reduces cell-to-cell interference, and can carry far more charge, so comparing most consumer MLC to TLC is not useful. The exception is Samsung's 3D MLC (which they no longer make). Micron's first-gen 3D MLC was just their TLC in MLC mode, which is not the same as native.