RIP intel server cpus.

[WereCat]

4 minutes ago, GoldenLag said:

im hoping its 20% or more uplift this gen. though the unshure bit is how high 7nm is going to clock. 

Rumor has it its supposed to clock significantly higher. Also its going to be TSMC instead of GloFo this time around.

But even if clocks will be higher, there should be much more improvements than just that. Lower latencies, interposer (maybe?) for better and faster link between cores, IPC bump, IMC improvement, support for faster RAM and who knows what else (better or more Cache, likely).

[GoldenLag]

Just now, WereCat said:

Rumor has it its supposed to clock significantly higher. Also its going to be TSMC instead of GloFo this time around.

But even if clocks will be higher, there should be much more improvements than just that. Lower latencies, interposer (maybe?) for better and faster link between cores, IPC bump, IMC improvement, support for faster RAM and who knows what else (better or more Cache, likely).

active interposer isnt this year. if it was we would hear rumours of AMD partnering with 96nm fabs. so far we havent had any juice on that fact. 

 

some IPC gain is expected, but how much is down to changes in architecture. we saw some uplift in Zen +. and + was just a remake on a new node

[schwellmo92]

Guys we’re talking about EPYC here, server processors are clocked significantly slower, you’ll be lucky to get much higher than 3GHz all-core with a 64 core part. For example a 7601 32 cores all-core turbo is only 2.7GHz. I’m putting this result down as a fake till proven wrong, the Cinebench results are too easy to manipulate, and this score is too outlandish. We’re talking about requiring like a greater than 50% uplift on performance (core for core).

[NelizMastr]

5 minutes ago, schwellmo92 said:

Guys we’re talking about EPYC here, server processors are clocked significantly slower, you’ll be lucky to get much higher than 3GHz all-core with a 64 core part. 

That, and this is an engineering sample, which is usually clocked even lower than the final part.

[schwellmo92]

36 minutes ago, WereCat said:

EPYC uses 8 channels of RAM, TR only 4 and the way the 2990WX CCX work its starved for RAM bandwidth and suffers from latency.

Even the lower clocked 32core 14nm EPYC scores higher when clocked lower than 2990WX with OC.

 

ROME will be also improved over the current gen so there goes another performance jump.

What’s your point? This EPYC has double the cores of the 2990WX and double the memory bandwidth, so it’s a linear increase.

[WereCat]

Just now, schwellmo92 said:

What’s your point? This EPYC has double the cores of the 2990WX and double the memory bandwidth, so it’s a linear increase.

Im comparing the 32 core 2990WX to the current 32 core EPYC.

The current 32 core EPYC scores higher than 2990WX.

[GoldenLag]

3 minutes ago, schwellmo92 said:

Guys we’re talking about EPYC here, server processors are clocked significantly slower, you’ll be lucky to get much higher than 3GHz all-core with a 64 core part. I’m putting this result down as a fake till proven wrong, the Cinebench results are too easy to manipulate.

they are clocked lower to hit the efficiency sweetspot. heat isnt too much of an issue. 

 

the epyc 7601 32 core hits a 2,7 ghz all core clock. 

 

its not outside reason to believe this could be a legitemate score

[GoldenLag]

2 minutes ago, WereCat said:

Im comparing the 32 core 2990WX to the current 32 core EPYC.

The current 32 core EPYC scores higher than 2990WX.

not at stock though. 

 

the 7601 compares to the 2970wx in terms of cinebench score when stock. 

 

a 7601 liniarly scaled to 64 cores and running at 3,4 ghz would score 10 245 in R15. you would need 20% extra + cinebench scaling issues to get to the score shown. its doable from what we know, but from an early engineering sample it is quite rightful to say its fishy. Rome isnt shipping in a good whole. and the AMD rumour mill shouldnt be running this early

[schwellmo92]

6 minutes ago, WereCat said:

Im comparing the 32 core 2990WX to the current 32 core EPYC.

The current 32 core EPYC scores higher than 2990WX.

That’s false, the 7601 does not score higher than the 2990WX

[AlTech]

56 minutes ago, GoldenLag said:

im more interested in a delided shot of what on earth is under that heatspreader. 

 

is it 4 dies? is it 9 dies?

AdoredTV said one of his sources told him it was 9 dies with 8 being dies with cores and stuff and then 1 die with a bunch of other jobs.

 

Just now, GoldenLag said:

not at stock though. 

 

the 7601 compares to the 2970wx in terms of cinebench score when stock. 

 

a 7601 liniarly scaled to 64 cores and running at 3,4 ghz would score 10 245 in R15. you would need 20% extra + cinebench scaling issues to get to the score shown. its doable from what we know, but from an early engineering sample it is quite rightful to say its fishy. Rome isnt shipping in a good whole. and the AMD rumour mill shouldnt be running this early

In memory benchmarks and memory demanding situations, the Epyc would perform better due to all 4 dies having memory access vs 2 on threadripper.

[schwellmo92]

7 minutes ago, GoldenLag said:

they are clocked lower to hit the efficiency sweetspot. heat isnt too much of an issue. 

 

the epyc 7601 32 core hits a 2,7 ghz all core clock. 

 

its not outside reason to believe this could be a legitemate score

The additional cores would need to scale perfectly and then a 50% performance uplift would be necessary (IPC + clocks), I don’t think it’s possible in a single refresh even if on a newer node.

[GoldenLag]

1 minute ago, schwellmo92 said:

The additional cores would need to scale perfectly and then a 50% performance uplift would be necessary (IPC + clocks), I don’t think it’s possible in a single refresh even if on a newer node.

another thing to note is epyc is still on 14nm. we arent talking from 12nm-7nm which would be the case with threadripper. 

 

it is 20% uplift when assuming from 3,4 ghz all core boost clock. then again we have allready seen R15 scaling poorly with dualsocket systems.

 

4 minutes ago, AluminiumTech said:

AdoredTV said one of his sources told him it was 9 dies with 8 being dies with cores and stuff and then 1 die with a bunch of other jobs.

the only issue with 9 dies is how this fits into the consumer space. does each CCX keep its capability to operate as a CPU without the "motherdie" being present?

 

how many cores would there be per CCX in consumer? will they produce 2 seperate dies?

[GoldenLag]

4 minutes ago, VegetableStu said:

I get the feeling they'll double the core count per die instead. 8 tiny chips and one bigger bus chip sounds hard for the IHS to stick on without breaking the smaller dies under heat expansion o_o

 

or do a vega and seal everything together

chips molded to a 96nm active interposer perhaps?

 

edit: just kidding. that probably wont be for a few extra gens

[vanished]

1 hour ago, jpjapers said:

https://www.hexus.net/tech/news/cpu/122222-amd-7nm-64c128t-epyc-benchmark-leaks/

-threads merged again-

this was not in news format, it's already been posted, and it's arguably not even news-worthy regardless

[GoldenLag]

5 minutes ago, Ryan_Vickers said:

 

-threads merged again-

this was not in news format, it's already been posted, and it's arguably not even news-worthy regardless

considering what news are these days its very much news. also we need to feed the news feed.

 

1 minute ago, VegetableStu said:

you had me thinking

hah, seriusly though. Zen 5 could be the thing. 

 

TR4 is ending by then, and 5nm is on the roadmap. 

 

an active interposer really needs a socket change

[vanished]

1 minute ago, GoldenLag said:

considering what news are these days its very much news. also we need to feed the news feed.

Is there a secret mountain of evidence that no one is talking about but they all know through some hive-mind mechanism?  Because all I've seen is the screenshot of cinebench and a blurry photo of an IHS.  If that's what counts as evidence/news these days we may as well drop the rule about having a source link altogether.

[GoldenLag]

Just now, Ryan_Vickers said:

Is there a secret mountain of evidence that no one is talking about but they all know through some hive-mind mechanism?  Because all I've seen is the screenshot of cinebench and a blurry photo of an IHS.  If that's what counts as evidence/news these days we may as well drop the rule about having a source link altogether.

i think we might have to get  at least 2kb of photgraphic evidence for it to count.

 

though i just noticed i dont like the tint of that heatspeader

[vanished]

Just now, GoldenLag said:

i think we might have to get  at least 2kb of photgraphic evidence for it to count.

 

though i just noticed i dont like the tint of that heatspeader

If it's not already clear, you can check the first page to see what I think of this "story"

[GoldenLag]

1 minute ago, Ryan_Vickers said:

If it's not already clear, you can check the first page to see what I think of this "story"

currently reading poorly translated chinese comments and having a laugh. soo much story to be had here. we should get a reading of what colours is present on the die to then calculate what colour it actually is. it looks too white

[vanished]

2 minutes ago, GoldenLag said:

currently reading poorly translated chinese comments and having a laugh. soo much story to be had here. we should get a reading of what colours is present on the die to then calculate what colour it actually is. it looks too white

It's unusually golden looking but the photo is of such poor quality and cropped in so tightly that there's no way to know if that's real or just bad lighting or camera settings.

[GoldenLag]

4 minutes ago, Ryan_Vickers said:

It's unusually golden looking but the photo is of such poor quality and cropped in so tightly that there's no way to know if that's real or just bad lighting or camera settings.

the issue is it doesnt behave how i expect the metal color of the ihs to behave. 

 

i does have a blue insertion bracket though at the top. that blue bit is similar to the one we know today in SP3, but not the same.

 

edit: example 

Spoiler

from SP3 socket

 

notice the top notch

 

Edited September 18, 2018 by GoldenLag

[vanished]

2 minutes ago, GoldenLag said:

the issue is it doesnt behave how i expect the metal color of the ihs to behave. 

 

i does have a blue insertion bracket though at the top. that blue bit is similar to the one we know today in SP3, but not the same.

 

edit: example 

  Hide contents

from SP3 socket

 

notice the top notch

 

Maybe they're trying to take on Intel's gold/silver/bronze naming and went a little too far

[The Benjamins]

This is NOT a 64c part, I think its 2x 48c parts.

A stock 7551p gets 3838, I seen 2x 7601 get 6100-7200, and De8aurs 4Ghz 2x 7601 get 9943, so I can't see how this magical chip is only 64c and can get 12000.

 

From my math it is about 2x 48c of around 3.0-3.2Ghz if their is no IPC improvments and if its a 10% uplift it would be around 2.7-2.9Ghz.

A 7551p has a all core turbo of 2.55Ghz and a 7601 has a all core turbo of 2.7ghz.

A 2x 48c setup with these clocks line up better with clocks and estimated TDP/power needs.

 

Also keep in mind this is a ENG sample which means its not going to be running high memory clocks and have a core clock lower then retail.

 

My Math

https://docs.google.com/spreadsheets/d/11MjPrxz_up7E39_SKpKqGZ6S36ON6KylXb51EMrOww0/edit?usp=sharing