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The Dirty Way Manufacturers are Downgrading Your PC

AlexTheGreatish

Memory manufacturers are changing the density of RAM in laptops, and the performance impact is staggering.

 

Check out Jarrod's Tech video: https://youtu.be/8XCeAdFqsKg

 

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1 minute ago, Mel0nMan said:

First SSDs, now RAM... what's next, replacing HDD platters with weights to save money?

back to good old magnetic media

Folding stats

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1 minute ago, Mel0nMan said:

what's next, replacing HDD platters with weights to save money?

They've been replacing them with air for quite a while already (using higher density, lower performance SMR even for low capacities just to reduce platter count)

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2 minutes ago, Nicnac said:

back to good old magnetic media

Reject flash. Return to magnets.

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1 minute ago, Kilrah said:

They've been replacing them with air

They've also been replacing helium with "air" to save a buck, too, making them run hotter.

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My problem with the video is that you focus on the number of RAM BGAs rather than the RAM timings it affects,

I have a high end RAM kit (Micron E die) which is 8GB 1Rx8,but the speed and the timings are significantly better than in any stock laptop out there (3466MHz @ 16-18-18-36-1T).

Manufacturers should display the timings of the modules they put in their laptops and not the number of BGAs.

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50 minutes ago, kingmustard said:

Timings are better for measuring,

At 3600MHz i recommend CL16 modules,but those in the link are slower than what i recommend because they are CL18 

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Take pics of your ram sticks before you send your computer in for ANY service. Even if the RAM came with the computer, they will swap good memory out. This is the most common scam in the PC and yes Mac repair market.

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I knew it was gonna be about RAM.

But a 20% performance its not much and the average person probably wouldn't care.

I run a intel 6th gen @2133 mghz but have a 3600 stick inthere mixed and I am fine.

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1 hour ago, Vishera said:

Manufacturers should display the timings of the modules they put in their laptops and not the number of BGAs.

No, they need both. At same timings you're still going to have more bandwidth with more chips. 

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18 minutes ago, Kilrah said:

No, they need both. At same timings you're still going to have more bandwidth with more chips. 

True

Less chips > higher latency > higher timings > worse performance

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and this will maybe become more complicated again by DDR 5 and PCIE 4.0? (as in what is in pcie 4.0 and how well it works?).

Also if hardware change for direct storage?

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6 minutes ago, Vishera said:

Less chips > higher latency > higher timings > worse performance

Unless I'm mistaken that's not how it's specced. On both your 4-chip and 8-chip modules the chips will be operating at the same timings and latencies (which refer to responding to a command), just that one command will transfer more data with more chips in parallel / resp you need more commands to get the same data if you have half the chips. Hence needing both specs to get a full picture.

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Wait, so do we really need to pay attention to 5 different statistics to have any idea at all how Ram with behave?

Size, obviously.
Speed
Rank
Density
And Timings

Or did we just discover that Rank does not really matter, 1 rank x16 chips has the same performance as 2 rank ram with also probably has 16 chips??

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2 minutes ago, wisnoskij said:

Or did we just discover that Rank does not really matter, 1 rank x16 chips has the same performance as 2 rank ram with also probably has 16 chips??

rank matters to a degree. too many ranks might not benefit it with the current setup, and too little overloaded with memory doesn't help either.

more density, have the speed and more ranks (2), lower GB and you only need a single side memory ram stick with 1 rank.

Certain workloads it might not matter, also you got infinity fabric on AMD.

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I will have to stop in and say that the librarian example at 9:20 ish is a bit incorrect. Or rather completely incorrect.

 

The statement "By increasing the density of the RAM to the point where one can get rid of half the chips on the module. Your basically laying off half of your librarians without reducing the number of books that they have to take care off." Is not particularly true.

 

The by 16 chip will access 16 data lines in parallel for each command. (Actually, DDR busses use bursts of memory accesses, and across multiple banks so I am going to be oversimplifying a fair bit.)

While the by 8 chip accesses only 8 data lines in parallel for each command.

 

The command is sent to All DRAM chips regardless. In effect, the throughput of the two chips is identical if all other specs remains the same and the total number of bits for the module remains the same. Module bus width for SDRAM DDR1, 2, 3, 4 and 5 is all 64 bits. But a DDR memory interface can have any arbitrary amount of bits, but it won't be compatible with standard RAM slots if it isn't 64 bits.

 

(In short, the librarian example is stupid to the point of saying that Ethernet port aggregation gives no extra bandwidth since one only has 1 NIC (with 2 or more ports), Or that a PCIe x16 port is as fast as an 8x one, or a 1x one for that matter, since there is only 1 device on the other side. Since a device obviously couldn't handle a link over a specific width that is smaller than what it is built to handle, just because some other device can only handle a link of a certain width.)

 

But if we look at things from a practical side, there is however more to the story.

 

Now, a by 16 DRAM chip can have some downsides compared to by 8 ones. But it is more about the difference in market between the two types of chips.

The by 16 is targeting more dense applications, and/or applications where assembly cost is more constrained. (putting more chips on a circuit board decreases manufacturing yield, and also increases pick and place machine time, ie, it is cheaper to put on the by 16 chips than the by 8 ones. (Sometimes in the dollar or two per board.) Since one isn't just needing fewer DRAM chips, but also passives around them. And the manufacturing yield is higher.)

 

The by 8 ones on the other hand is just the standard commodity size for DRAM chips, ie, there is everything from garbage to gold in this category.

 

There is also by 32 chips on the market, these are though more common for more compact applications like SBCs, phones and such where one might not want to populate more than 1-2 RAM chips total. Since BGAs are abhorrent when it comes to yield, so reducing package count is a good way to shave down manufacturing costs by a lot.

 

If a chip is by 8,16 or 32, or even 4 (yes that also technically exists) doesn't matter. What matters is the supported RAM bandwidth, and the timings that the chip is able to keep up with.

 

Though, if all one does is buy the cheapest RAM modules one can get a hold of that has sufficiently high clock speeds to be "on spec", then one shouldn't be surprised that the less easily marketed RAM timings gets thrown into the gutter. (after all, a lot of manufacturers only put in 1 RAM module to start with, since assembly cost is relatively expensive, and consumers hunt for the lowest prices above much else. Only tech interested people or people that cares about performance will do more research and take something more pricey or do an upgrade themselves.)

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15 minutes ago, Nystemy said:

The by 16 chip will access 16 data lines in parallel for each command. (Actually, DDR busses use bursts of memory accesses, and across multiple banks so I am going to be oversimplifying a fair bit.)

While the by 8 chip accesses only 8 data lines in parallel for each command.

 

The command is sent to All DRAM chips regardless. In effect, the throughput of the two chips is identical if all other specs remains the same.

(In short, the librarian example is stupid to the point of saying that Ethernet port aggregation gives no extra bandwidth since one only has 1 NIC (with 2 or more ports), Or that a PCIe x16 port is as fast as an 8x one, or a 1x one for that matter, since there is only 1 device on the other side. Since a device obviously couldn't handle a link over a specific width that is smaller than what it is built to handle, just because some other device can only handle a link of a certain width.)

but wouldn't that require the rank or controller if that is what its called, to be able to keep up? (or if that is how it needs to work anyways, my bad).

or as seen with other systems if a power limit could restriant the ram, maybe not by the cpu but else where?

 

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Guys I'm sorry for being dumb. I have a desktop PC with G.Skill TRIDENT Z [F4-3200C14D-32GTZSW] kit. Does this issue affect this particular kit? I can't find info about density anywhere

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25 minutes ago, Quackers101 said:

but wouldn't that require the rank or controller if that is what its called, to be able to keep up? (or if that is how it needs to work anyways, my bad).

or as seen with other systems if a power limit could restriant the ram, maybe not by the cpu but else where?

The memory controller in the CPU has 64 bits per memory channel, and is able to keep up with data at the clock speed that the controller and RAM is able to run at.

From the perspective of the memory controller, it doesn't know anything about how many chips the RAM module is split into. All it knows is that it gets 64 bits in parallel. If that is from one gigantic 64x chip or from 64 small 1x chips, the controller is non the wiser.

 

In regards to memory ranks.
A memory rank is just a memory module. The memory buss has ranks similar to how it has addresses. A given memory module can also have multiple ranks, ie it is a bit like two or more memory modules in one.
The memory controller can send a command to one rank, and while that rank is preoccupied with either a DRAM refresh cycle, or changing row address. During this time of preoccupation the memory controller can still happily talk to another rank on that memory channel. Ie, the memory channel doesn't have to sit silent during that time. Increases throughput slightly. (really slightly, 1-5% at the best of times.)

In regards to power, yes, one can technically put in enough RAM to "over power" the motherboard's memory VRM, but typically one will reach and exceed the CPU's max amount of supported memory long before this is a problem.

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Not the worst offender.

 

I bought an HP 15s laptop with Ryzen 4500U with an advertised DDR4-2666 MHz 2 × 4 GB dual channel memory configuration, instead I received a unit with a single DDR4-3200 MHz 8 GB module.

 

And despite the processor supporting 3200 MHz memory and a 3200 MHz module installed, the memory speed cannot be changed in BIOS. HP says the the DDR4-3200 module was "bridged to" DDR4-2666, whatever that means. 

 

So not only HP locked down the memory speed in BIOS so the machine cannot utilized faster memory, but the switch from dual channel to single channel also halved the available bandwidth, making it much worse.

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Funny LTT mentions G-Skill and shows their website, when there's no information on memory banks for any of their Trident Z Neo (didn't check others as this is what I have) sticks anywhere on the site.

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AHOC put out a great breakdown of what this means for Desktop RAM, and goes over the details of what is actually happening without relying on metaphors/bad librarian examples - video

Edited by CrazyByDefault
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