Intel To Launch 10nm Cannonlake in 2017.

[OCing Noob]

how fast they are going down my grand son probably will use nano nm tech lol

 

Box will show

 

" kindly use the microscope included in the CPU box to put CPU on mobo" LOL

[shujin]

The difficulty in transistor shrinkage is to maintain no current to pass from source to drain when gate is off. This distance is the fab size. here as per article 10nm. So there is a limit to which this shrinkage can be done. So new methods can be done to make it closer. As the shrinkage goes by a new phenomena takes place called quantum tunneling. the power tunnels to source and drain in spite of anything we do. This is supposed to happen at 3 to 4 atom size. The radius of silicon atom is 117.6 pm; so the diameter is 235.2 pm. so 4 to 5 atom size so this will equate to 940.8 pm to 1.1nm. So that will be where the shrinkage hits a stop. Even if somehow the tunneling did not occur the limit will be 235.2 pm. People will say then quantum computing will give way to future. that is not exactly correct. quantum computer is good only for high parallel independent computation. which can be used for deep neural networks, fluid dynamics and other research application. the general processing and algorithm will be extremely slow compared to a classical processor. Intel has already showcased 10nm silicon before commercialization of 14nm @Linus @Slick

most interesting thing I had read/heard this week. thanks for all that knowledge sharing

[RexinOridle]

Well, 5 nm hmmm. Without a crazy ass cooler you will have some quantum computing going on there, if you know what I mean, electrons disappearing out of nowhere.

[jos]

Well, 5 nm hmmm. Without a crazy ass cooler you will have some quantum computing going on there, if you know what I mean, electrons disappearing out of nowhere.

I do not think atom appearing from no were over 5nm problem occur at subatomical level

[RagnarokDel]

how fast they are going down my grand son probably will use nano nm tech lol

 

Box will show

 

" kindly use the microscope included in the CPU box to put CPU on mobo" LOL

or it's going to be a 512 core cpu

[marldorthegreat]

I kinda doubt it atm. AMD has been at least a generation behind Intel for a while, not to mention Intel has more money to pour into designing new chips. 

Yes, Amd is behind but will have 14nm by 2016. And 10nm by 2017/2018, Remember they do not make there own chips

[patrickjp93]

It's not possible for them to get ahead of Intel. Intel invests in their own fabs while AMD relies on Samsung or global foundries to build their chips. Right now Intel is selling 14nm chips while the other guys are still trying to get it to work.

Correction: Intel is selling 14nm chips while the other guys are still trying to get FinFET working on the 20nm node. So, not only was TSMC's 20nm tech garbage, but the 16nmFF was really the same horrible 20nm with FF, leading to the disaster which has forced Nvidia to change to Samsung's foundries. It's a firestorm and Intel has no real competition until mid 2016 at the earliest, hence the 10nm delays. If Intel wanted it could dive headfirst into using multi-level patterning to build 10nm chips since EUV is out of the game right now.

https://www.semiwiki.com/forum/content/3884-who-will-lead-10nm.html

Yes, Amd is behind but will have 14nm by 2016. And 10nm by 2017/2018, Remember they do not make there own chips

No, AMD will have Samsung's "14nmFF" process, but the truth is that's still just 20nm with FF if you read the article just above. It's barely better than Intel's 22nmFF chips.

[patrickjp93]

The difficulty in transistor shrinkage is to maintain no current to pass from source to drain when gate is off. This distance is the fab size. here as per article 10nm. So there is a limit to which this shrinkage can be done. So new methods can be done to make it closer. As the shrinkage goes by a new phenomena takes place called quantum tunneling. the power tunnels to source and drain in spite of anything we do. This is supposed to happen at 3 to 4 atom size. The radius of silicon atom is 117.6 pm; so the diameter is 235.2 pm. so 4 to 5 atom size so this will equate to 940.8 pm to 1.1nm. So that will be where the shrinkage hits a stop. Even if somehow the tunneling did not occur the limit will be 235.2 pm. People will say then quantum computing will give way to future. that is not exactly correct. quantum computer is good only for high parallel independent computation. which can be used for deep neural networks, fluid dynamics and other research application. the general processing and algorithm will be extremely slow compared to a classical processor. Intel has already showcased 10nm silicon before commercialization of 14nm @Linus @Slick

My only qualm with this is your definition of quantum computing. It would actually make something like the traveling salesman (underlying problem of GPS quickest route, using least amount of movement for robotic arms on assembly lines, etc.) easy to solve quickly. Encryption/decryption as well will become jokes before a true quantum computer.

[LukaP]

 Encryption/decryption as well will become jokes before a true quantum computer.

Current* encryption/decryption. There will be a quantum based algorythm developed (or already is) to replace the ones we have now. 

 

@jos good post, i agree with most of it but the limit of shrinkage. there were working transistors made out of one atom. i see no reason why with time and resources, that couldnt be industrialised into a chip.

[-CLASSIFIED-]

does this mean itll be harder to overclock the future chips then ?

[Norman_the_Owl]

how fast they are going down my grand son probably will use nano nm tech lol

 

Box will show

 

" kindly use the microscope included in the CPU box to put CPU on mobo" LOL

A die shrink doens't make the CPU any smaller.

 

CPUs are only getting bigger because we need more contacts, traces, etc.

 

There aren't going to be ITX motherboards for long

[vm'N]

That's true, but AMD hasn't been researching any new architectures for 3 years now, which would allow them to invest everything in their next big release.

What are you talking about?

A new architecture takes around ~5 years to design.

They have been revising their current architecture (just as any other processor manufacture would).

Correction: Intel is selling 14nm chips while the other guys are still trying to get FinFET working on the 20nm node.

Correction: Intel is selling something 16-18nm FF, meanwhile other are working with 20nm FF.

www.semiwiki.com

the Intel 22nm process is not a true 22nm process by the standard semiconductor definition

However, the node size is almost completely irrelevant from company to company as their method of calculating their node size changes.

So, not only was TSMC's 20nm tech garbage, but the 16nmFF was really the same horrible 20nm with FF, leading to the disaster which has forced Nvidia to change to Samsung's foundries.

Couldn't this just be because samsung will have their 14/20nm FF out before TSMC would?

Their 16/20nm FF seems to scale as expected from their 28nm HPM.

It's a firestorm and Intel has no real competition until mid 2016 at the earliest, hence the 10nm delays. If Intel wanted it could dive headfirst into using multi-level patterning to build 10nm chips since EUV is out of the game right now.

https://www.semiwiki.com/forum/content/3884-who-will-lead-10nm.html

Intel do have real competition. They dont have any competition from AMD, that is true, however, AMD haven't been Intels concern for a long time.

I doubt 10nm is delayed just because Intel didn't have any "competition".

It is not just about been able to produce the chips, it is also to keep the prices down.

That is the great benefit of been a big semiconductor.

No, AMD will have Samsung's "14nmFF" process, but the truth is that's still just 20nm with FF if you read the article just above. It's barely better than Intel's 22nmFF chips.

I think we will expect their 14/20nm FF to perform around Intels 14nm.

Intels 22nm was losing for samsungs 28nm LP.

[martinrox1568]

I think they have that technology already. 

They are squeezing money from everything they can before next manufacturing process.

Doubt it. If I were Intel, I'd try desperately to release everything the second it becomes profitable, and destroy AMD to bankruptcy.

[Bensemus]

@vm'N Broadwell is shipping and is 14nm...

http://en.m.wikipedia.org/wiki/Broadwell_(microarchitecture)

[Tocsin_786]

Does that mean AMD may have 10nm chips before intel? Rumour has it they'll have them by 2016

i thought those were 14nm? 

[euniqe]

oh come ON intel - we don't even have skylake yet!!!!!!!!!

[LukaP]

oh come ON intel - we don't even have skylake yet!!!!!!!!!

Roadmaps for future products are there long before even RND is starting on them. Id bet my ass that intel has internal roadmaps up to atleast 5nm right now.

[vm'N]

@vm'N Broadwell is shipping and is 14nm...

http://en.m.wikipedia.org/wiki/Broadwell_(microarchitecture)

My guess is you didn't read my whole reply..

[patrickjp93]

A die shrink doens't make the CPU any smaller.

CPUs are only getting bigger because we need more contacts, traces, etc.

There aren't going to be ITX motherboards for long

CPUs have been getting smaller, not bigger. Broadwell K chips will only be ~180mm sq.

[Michael McAllister]

does this mean itll be harder to overclock the future chips then ?

 

Yes, unless manufacturers find a different material to reduce the heat output by then.

[patrickjp93]

does this mean itll be harder to overclock the future chips then ?

 

 

Yes, unless manufacturers find a different material to reduce the heat output by then.

Not necessarily. Remember the power needed per transistor is greatly reduced. Program path lengths are also reduced, and though we are getting denser, the ratio of surface area to volume is getting better and better, which will lead to some back pressure on heating due to increased density.

[-CLASSIFIED-]

Not necessarily. Remember the power needed per transistor is greatly reduced. Program path lengths are also reduced, and though we are getting denser, the ratio of surface area to volume is getting better and better, which will lead to some back pressure on heating due to increased density.

i was thinking , that because the cpu is getting smaller , that it wouldn't be able to handle higher voltages as well , therefore meaning that the cpu probably won't be able to get a higher frequency . idk if you can decipher what im trying to throw out there or not , as i have a hard time explianing my thoughts on paper lol 

[jos]

Current* encryption/decryption. There will be a quantum based algorythm developed (or already is) to replace the ones we have now. 

 

@jos good post, i agree with most of it but the limit of shrinkage. there were working transistors made out of one atom. i see no reason why with time and resources, that couldnt be industrialised into a chip.

The Single-Atom Transistor was invented and first demonstrated in 2004 by Prof. Thomas Schimmel and his team of scientists at the Karlsruhe Institute of Technology.Here Gate electrode is a single atom is reversibly moved in and out of a tiny junction, in this way closing and opening an electrical contact. This means that fabrication process is still one atom size.

[NoctHorn]

You see, this is why Intel is doing so much better than AMD in the CPU market.  They have a plan.

 

We know what is going to be expected with the cannonlake platform before skylake is even released.  What has AMD done to demonstrate that they have any plans in the CPU market?

[-CLASSIFIED-]

You see, this is why Intel is doing so much better than AMD in the CPU market.  They have a plan.

 

We know what is going to be expected with the cannonlake platform before skylake is even released.  What has AMD done to demonstrate that they have any plans in the CPU market?

the only thing i can see amd doing is flying by the seat of their pants