It all ranges from a new lithography size (14nm->10nm), poor yields from the silicon wafers, and also a new way of printing the circuits out on the wafers called EUV (short for Extreme Ultraviolet lithography). Since the new lithography is a lot different than what they were previously using 193nm UV light to print the circuitry into the silicon, this changes how they normally do things as they are delayed in mass producing chips and prioritize fixing the issues that arise. Don't forget that the smaller you go, the increased chances of malfunctions occur since we are on a tightrope with the laws of physics.
One example of going really small is the smaller the lithography size, the shorter the gate's length is in a transistor...now Intel is at the point that electricity will actually jump this gate, causing a short and is unintended and thus, poor yields. Now also don't forget EUV is a whole new process for Intel as they straighten out the issues of this new lithography process. The whole semiconductor industry measures transistor "devices" different so Intel's 14nm is not the same is AMD's 14nm (really TSMC as they are the semiconductor fabrication company that AMD uses as AMD, Apple, and NVIDIA are what we call "Fab-less" as they do not own any semiconductor fabrication plants, rather they contract their work out to companies that specialize in this industry).