Asrock Rack and SuperMicro announces Xeon Phi systems

[patrickjp93]

On August 25, 2559 BE at 9:11 AM, JurunceNK said:

For all of you who think you can game on one of these bad boys, forget it. There's no way there is any kind of support for that hardware at all.

 

A machine like this is especially designed for HPC like a couple of people here pointed out, and I can understand that. Hell, if I needed something for HPC tasks and I had the money walkin' around, I'll go and hit up Supermicro or someone who's selling one of these machines 

If it's x86 code, it'll run. It just depends on how well.

[Curufinwe_wins]

4 minutes ago, patrickjp93 said:

Skylake Purley. I think Skylake E was rumored to be on something like LGA2066 a short while ago

Yea that and the Kaby-X (which should be really cool for gamers BTW) were both leaked to have LGA2066 (intel slide leaks are generally extremely accurate as you well know.)

[Curufinwe_wins]

4 minutes ago, patrickjp93 said:

If it's x86 code, it'll run. It just depends on how well.

The render farms this thing could run... ugh my mouth is watering... unfortunately GPU encoding is still really bad quality per unit size atm so yea...

[8uhbbhu8]

I wonder how one of these things would do at folding? Would be interesting to find out.

[Marinatall_Ironside]

33 minutes ago, patrickjp93 said:

If it's x86 code, it'll run. It just depends on how well.

True. If it can run well, then you can theoretically game on a Xeon Phi system. But I just don't see the practicality of doing so. If anything, if I needed (or wanted) a Xeon Phi workstation with the 72-core quad-threaded (288 threads) CPU, I'd instantly turn it into a rendering node and slam Windows Server 2016 on there so programs like Autodesk Backburner can take advantage of more than 18 cores at a time (but I have no clue as to how well it will work with 288 threads, as the Xeon Phi is a quad-threaded CPU) 

 

Since I can trust you with your software engineering background, how well (or how can) a rendering program leverage a Xeon Phi (assuming it actually works) CPU/MIC card? Because in the grand scheme of things, a rendering program will use whatever is available to it.

Edited August 26, 2016 by JurunceNK

[patrickjp93]

12 minutes ago, 8uhbbhu8 said:

I wonder how one of these things would do at folding? Would be interesting to find out.

Extremely well. Look at how various CPUs perform per core per clock and compare that to GPUs. Intel's vector units are much more flexible and can do much more complex tasks per clock vs. the SPs on GPUs.

[patrickjp93]

2 minutes ago, JurunceNK said:

True. If it can run well, then you can theoretically game on a Xeon Phi system. But I just don't see the practicality of doing so. If anything, if I needed (or wanted) a Xeon Phi workstation with the 72-core quad-threaded (288 threads) CPU, I'd instantly turn it into a rendering node and slam Windows Server 2016 on there so programs like Autodesk Backburner can take advantage of more than 18 cores at a time (but I have no clue as to how well it will work with 288 threads, as the Xeon Phi is a quad-threaded CPU) 

 

Since I can trust you with your software programming background, how well (or how can) a rendering program leverage a Xeon Phi (assuming it actually works) CPU/MIC card? Because in the grand scheme of things, a rendering program will use whatever is available to it.

Well, the vector units on Intel's CPUs are much more powerful and can bundle several ops on a GPU into a single instruction and shave a few clock cycles. The advantage of having 2 vector units per core will allow for much better scatter/gather operations than having a single would allow, but it takes time to develop code optimized for it, so I'd say in the short term it will be good, but in a couple years it'll be a stellar technology.

[Marinatall_Ironside]

5 minutes ago, patrickjp93 said:

Well, the vector units on Intel's CPUs are much more powerful and can bundle several ops on a GPU into a single instruction and shave a few clock cycles. The advantage of having 2 vector units per core will allow for much better scatter/gather operations than having a single would allow, but it takes time to develop code optimized for it, so I'd say in the short term it will be good, but in a couple years it'll be a stellar technology.

Okay .

 

Hopefully in a couple of years or so, we can begin to see rendering nodes all powered by 68-72-core Xeon Phis all demolishing 3D rendering projects. Hell, I'd be happy to be one of those animators for the next AAA game just offloading all the rendering tasks to one of those machines because it's just so goddamn fast that a 14-core, dual-GPU workstation would be... wasted to put it that way. Because at that point, with that kind of workflow model, I can easily get away with a quad-core Xeon E3 CPU and a single Quadro P6000 GPU for anything GPU-accelerated and the massive 24GB of VRAM to hold all of the data for the scene.

Edited August 26, 2016 by JurunceNK

[patrickjp93]

19 minutes ago, JurunceNK said:

Okay .

 

Hopefully in a couple of years or so, we can begin to see rendering nodes all powered by 68-72-core Xeon Phis all demolishing 3D rendering projects. Hell, I'd be happy to be one of those animators for the next AAA game just offloading all the rendering tasks to one of those machines because it's just so goddamn fast that a 14-core, dual-GPU workstation would be... wasted to put it that way. Because at that point, with that kind of workflow model, I can easily get away with a quad-core Xeon E3 CPU and a single Quadro P6000 GPU for anything GPU-accelerated and the massive 24GB of VRAM to hold all of the data for the scene.

In a couple years we'll have much bigger versions of these. Knight's Hill I think is targeting 50% higher core counts.

[Marinatall_Ironside]

Just now, patrickjp93 said:

In a couple years we'll have much bigger versions of these. Knight's Hill I think is targeting 50% higher core counts.

Sheeit. But it's still good progress nonetheless to see that it's becoming a possibility.

[patrickjp93]

4 minutes ago, JurunceNK said:

Sheeit. But it's still good progress nonetheless to see that it's becoming a possibility.

It's a developer preview document you have to have a registered account to view, but plans for future ISAs include AVX 4 (1024-bit) and Small Algorithm Instuction (SAI), so greater MIMD support and, assuming the same clock speed and double vector architecture as Knight's Landing:

 

108 * 2048/32 * 2 * 1.5*10^9 = 20.736*10^12 Flops for mid-late 2017.

[Marinatall_Ironside]

11 minutes ago, patrickjp93 said:

It's a developer preview document you have to have a registered account to view, but plans for future ISAs include AVX 4 (1024-bit) and Small Algorithm Instuction (SAI), so greater MIMD support and, assuming the same clock speed and double vector architecture as Knight's Landing:

 

108 * 2048/32 * 2 * 1.5*10^9 = 20.736*10^12 Flops for mid-late 2017.

Damn. Yeah as a regular consumer like me, I cannot easily get access to the documents to see for myself. But it looks like it's on the bright side of things if all goes well that is  .

[vanished]

On 8/23/2016 at 10:56 PM, Ryan_Vickers said:

Now the only question is how long until Linus thinks he needs one of these for the office  

Wow they actually are getting one!  (source: Linus on WAN show)

Should be interesting, especially since he apparently has no idea what to do with it

[Sauron]

On 8/24/2016 at 6:56 AM, Ryan_Vickers said:

True  

 

Now the only question is how long until Linus thinks he needs one of these for the office  

He said on the wan show he has one coming

[vanished]

18 minutes ago, Sauron said:

He said on the wan show he has one coming

yes

V

25 minutes ago, Ryan_Vickers said:

Wow they actually are getting one!  (source: Linus on WAN show)

Should be interesting, especially since he apparently has no idea what to do with it

 

[Misanthrope]

I really like Asrock: they're like a bunch of mad scientists always ready and eager to try whatever is needed.

 

-Others: "Actually I'm not sure x99 on itx is feasi

-Asrock: "Done! Here it is you can buy it now! X99 itx!"

[vanished]

1 minute ago, Misanthrope said:

I really like Asrock: they're like a bunch of mad scientists always ready and eager to try whatever is needed.

 

-Others: "Actually I'm not sure x99 on itx is feasi

-Asrock: "Done! Here is is you can buy it now! X99 itx!"

If that's true I want to see a quad socket board for these chips from them

[Misanthrope]

Just now, Ryan_Vickers said:

If that's true I want to see a quad socket board for these chips from them

I'm sure they're already sketching it out: "But it won't physically fit...Oh i know, daughter board! fuck it let's try!"

[IvantheDugtrio]

I'm getting the liquid-cooled workstation for my work. I plan to use it for bioinformatics processing. I'll let you guys know how it goes.

 

For dev system it's not bad at $4951.50. Configured with 96GB of DDR4 2133 and an Intel S3510 800GB SSD. It has onboard graphics but only has a single VGA port so I'll mostly work over SSH.

 

For Linus the highly vectorized nature of this processor could seriously accelerate his transcoding work. 72 cores with 288 threads can do a lot of work given an optimized workflow. Too bad he would have to wait for Adobe to support it first.

 

[TheRandomness]

On 29 August 2016 at 0:43 AM, Misanthrope said:

I'm sure they're already sketching it out: "But it won't physically fit...Oh i know, daughter board! fuck it let's try!"

VRMs on the underside, SODIMMS on a daughter board and an M.2 slot on the underside too. 

[patrickjp93]

11 hours ago, IvantheDugtrio said:

I'm getting the liquid-cooled workstation for my work. I plan to use it for bioinformatics processing. I'll let you guys know how it goes.

 

For dev system it's not bad at $4951.50. Configured with 96GB of DDR4 2133 and an Intel S3510 800GB SSD. It has onboard graphics but only has a single VGA port so I'll mostly work over SSH.

 

For Linus the highly vectorized nature of this processor could seriously accelerate his transcoding work. 72 cores with 288 threads can do a lot of work given an optimized workflow. Too bad he would have to wait for Adobe to support it first.

 

Please tell me you're not kneecapping it by using a Python Library to process that data...

 

actually Linus just posted a video about why more cores doesn't work well for LMG's production chain.

2 hours ago, TheRandomness said:

VRMs on the underside, SODIMMS on a daughter board and an M.2 slot on the underside too. 

You can't put VRMs for those 250W mothers on the underside of the socket/board. Without very high airflow or direct contact cooling, they'll melt, quickly.

[TheRandomness]

1 minute ago, patrickjp93 said:

Please tell me you're not kneecapping it by using a Python Library to process that data...

 

actually Linus just posted a video about why more cores doesn't work well for LMG's production chain.

You can't put VRMs for those 250W mothers on the underside of the socket/board. Without very high airflow or direct contact cooling, they'll melt, quickly.

Design cases that essentially function as the heatsink for an 8+2 Phase design. 

[patrickjp93]

41 minutes ago, TheRandomness said:

Design cases that essentially function as the heatsink for an 8+2 Phase design. 

8+2 is not enough for that. Multi-socket Xeon boards have 12 phases per socket! A Xeon Phi requires as much power as a Titan X when at full bore.

[TheRandomness]

1 hour ago, patrickjp93 said:

8+2 is not enough for that. Multi-socket Xeon boards have 12 phases per socket! A Xeon Phi requires as much power as a Titan X when at full bore.

Shhh... Fine, daughterboard for power delivery too

[IvantheDugtrio]

13 hours ago, patrickjp93 said:

Please tell me you're not kneecapping it by using a Python Library to process that data...

 

actually Linus just posted a video about why more cores doesn't work well for LMG's production chain.

You can't put VRMs for those 250W mothers on the underside of the socket/board. Without very high airflow or direct contact cooling, they'll melt, quickly.

The wrapper for the pipeline is python but the actual HPC is a mix of C and Java. I'll be working primarily on the C code.

 

I'll also see if I can configure the pipeline to run certain tools on specific nodes of this asymmetrical torque cluster (ported C tools on the Xeon Phi, everything else on the regular Xeons).