8 core Processors - Intel vs AMD

[Thony]

Not really. The Intel 4670K is £163 where as the FX is £103. But Intel costs more because they mpd their CPUs to a higher standard.

Well thats a hell of a performance for £100.

[Mooshi]

AMD 8 cores are good value for money, but their performance is really more on par with an Intel quad for many things and only really stretches its legs in zip and other applications that actually utilizes 8 cores.

[SkilledRebuilds]

AMD FX 8-cores are not actually 8 cores*. There have 8 Integer units but only 4 floating point units. Intel cores are not separated like this, possessing 8 each.

AMD FX chips are much lower instructions per clock (IPC) - an FX chip vs. any Intel chip, even a Pentium, if they are the same frequency the Intel is stronger per-core.

 

There are other differences, which have been mentioned above, so I won't bother with that.

 

*This also goes for 6-cores which are really 6/3.

A lot of people seem to either not know this, or skip over telling people, I think ^this^ is the single MOST important reason why their behind (followed by IPC being not as strong)

8Cores with 4 Floating point units to share. Is there an article on why they went this way of 8i/4fp instead of 8i/8fp?

[patrickjp93]

Intels 8- coe has 16 threads. FX has only 8 threads... AMDs architecture is several nm bigger than intels. Thats reason why old i7s quads are not as good as latest quads.

All who doubt latest Fx and think it is much worse than latest i5, just wait for Logan's (tek syndicate) upcoming comparison video

Intel is about performance (high cost) and Amd is about budget (performance per dollar)

Also Amd focused on their APUs (hence why intel got far ahead and can charge $1000 for cpu due to lack of competition). Amd only adds more mhz to their cpus so 0 progress in architecture however new 8370e has lower power consumption.

Have you not read the 8370 reviews lying around? The E model can't match the 8350 and the 8370 is barely an improvement. http://www.pcper.com/reviews/Processors/AMD-2014-FX-Refresh-FX-9590-FX-8370-and-FX-8370e-Review/Results-3D-Mark-Fire-Stri

[patrickjp93]

A lot of people seem to either not know this, or skip over telling people, I think ^this^ is the single MOST important reason why their behind (followed by IPC being not as strong)

8Cores with 4 Floating point units to share. Is there an article on why they went this way of 8i/4fp instead of 8i/8fp?

To make cores cheap to produce. The most expensive component of a CPU is the FPU and surrounding control logic. The same holds true for GPU cores minus the control logic since there almost is none. They thought they could beat Intel's Core line with a price war. They found out the hard way they couldn't.

 

Also, one more point missing from that earlier description is this: AMD's FPU takes between 6 and 10 cycles to do most of its work beyond the simple add/subtract instructions. The max Intel's floating point and vector multiplies take are 5 cycles, and with Broadwell the FP multiply/divide are shaved down to 3 cycles.

[vm'N]

The most expensive component of a CPU is the FPU and surrounding control logic.

Do you have any kind of validation on this statement?

Also the reason why they are sharing the SIMD/FPU is because that 2x128FMAC and 2xMMX units are MORE than enough for the general person.

The shared FPU is not to be blamed for piledrivers bad performance. They saw no real benefit giving each ALU cluster a dedicated SIMD/FPU cluster.

[patrickjp93]

Do you have any kind of validation on this statement?

Also the reason why they are sharing the SIMD/FPU is because that 2x128FMAC and 2xMMX units are MORE than enough for the general person.

The shared FPU is not to be blamed for piledrivers bad performance. They saw no real benefit giving each ALU cluster a dedicated SIMD/FPU cluster.

High leakage, low ipc, fewer resources which professional applications can leverage. It all adds up. Also, I'm surprised you don't just know the FPU is the most expensive part to make. Floating point logic is the most complex thing CPU circuitry does due to having a sign, and exponent, and a decimal/mantissa. The way arithmetic operations have to be implemented is far more complex, like having only specific bits in the FPU rotate at a time.

AMD chose to put 1 FPU per module because it's the most difficult to engineer efficiently, the control logic is massive (in Intel's case), and it costs silicon. They couldn't win in performance per core so they went with more, cheaper cores.

[vm'N]

High leakage, low ipc, fewer resources which professional applications can leverage. It all adds up. Also, I'm surprised you don't just know the FPU is the most expensive part to make. Floating point logic is the most complex thing CPU circuitry does due to having a sign, and exponent, and a decimal/mantissa. The way arithmetic operations have to be implemented is far more complex, like having only specific bits in the FPU rotate at a time.

AMD chose to put 1 FPU per module because it's the most difficult to engineer efficiently, the control logic is massive (in Intel's case), and it costs silicon. They couldn't win in performance per core so they went with more, cheaper cores.

You are still wrong. The FPU is not expensive to implement.

It is far from the most expensive part of a CPU. The low IPC means nothing, when you still get high throughput.

The idea with SIMD (Single instruction multiple data) is having higher throughput with lesser instructions.

The FPU is not the most complex part of a CPU neither.

Why do you think processors with a low production-budget still feature a decent SIMD/FPU?

Something like implementing OoO is by far more expensive to implement. Hence why low cost processors are in-order.

Then there is cache. Cache alone can take upto ~50% of the die. That a lot of space to combat memory frequency and latency.

There are many parts that are by far more expensive to implement than the SIMD/FPU.

AMD choose 2x128bit FMAC units combined with 2xMMX units because most software wont need more.

Implementing another FPU within the same module, would only increase performance slightly, but will not scale well, because of the bad memory management, bad prediction and even worse cache-design won't be able to feed it.

Keeping EUs fed at all with useful resources at all time, now that is expensive.

[patrickjp93]

You are still wrong. The FPU is not expensive to implement.

It is far from the most expensive part of a CPU. The low IPC means nothing, when you still get high throughput.

The idea with SIMD (Single instruction multiple data) is having higher throughput with lesser instructions.

The FPU is not the most complex part of a CPU neither.

Why do you think processors with a low production-budget still feature a decent SIMD/FPU?

Something like implementing OoO is by far more expensive to implement. Hence why low cost processors are in-order.

Then there is cache. Cache alone can take upto ~50% of the die. That a lot of space to combat memory frequency and latency.

There are many parts that are by far more expensive to implement than the SIMD/FPU.

AMD choose 2x128bit FMAC units combined with 2xMMX units because most software wont need more.

Implementing another FPU within the same module, would only increase performance slightly, but will not scale well, because of the bad memory management, bad prediction and even worse cache-design won't be able to feed it.

Keeping EUs fed at all with useful resources at all time, now that is expensive.

You're running in circles. All the control logic around the FPU is much more complex than around the integer unit. The scheduling is one small part of it. To implement an FPU well, you need the control logic around it. Together they are the most expensive piece of a CPU. 1+1=2.

Also, most other processors have crap FPUs that take 8 cycles to do a multiply. Cheap versions of a complex product.

And cache is cheap despite what academics tell you.

Like I said it's the FPU plus all the very advanced control/scheduling logic around it. That is the most expensive single chunk of a good CPU.

[vm'N]

You're running in circles.

Sure thing.

All the control logic around the FPU is much more complex than around the integer unit. The scheduling is one small part of it. To implement an FPU well, you need the control logic around it. Together they are the most expensive piece of a CPU. 1+1=2.

You are completely off. Do you known why Intel is tryly ahead? It is because of their predictions system is so advanced compared the the rest of the industry and their cache-system.

Today it is about having the resource ready before you even need them. This is why a good prediction system compared with OoO is incredible expensive.

Also hence why we see inorder architecture on low cost processors. It is simply to expensive to implement those parts.

I'm not talking about cache alone, it is the entire cache-sub-system.

It is not implementing execution units that is expensive, it is implementing systems to keep those units fed that is expensive.

[rentaspoon]

Have you not read the 8370 reviews lying around? The E model can't match the 8350 and the 8370 is barely an improvement. http://www.pcper.com/reviews/Processors/AMD-2014-FX-Refresh-FX-9590-FX-8370-and-FX-8370e-Review/Results-3D-Mark-Fire-Stri

He does say that he was using the MSI 970 mobo, it will be interesting to see what he gets with the 990FX board he was going to test with, if there is any difference.

As for the Intel and AMDs 8 core if your going for gaming it doesn't matter to much what you pick for today's games.

Although I am disappointed with AMDs refresh, I'm looking forward to the money off though

[FellTheSky]

Intels 8- coe has 16 threads. FX has only 8 threads... AMDs architecture is several nm bigger than intels. Thats reason why old i7s quads are not as good as latest quads.

All who doubt latest Fx and think it is much worse than latest i5, just wait for Logan's (tek syndicate) upcoming comparison video

Intel is about performance (high cost) and Amd is about budget (performance per dollar)

Also Amd focused on their APUs (hence why intel got far ahead and can charge $1000 for cpu due to lack of competition). Amd only adds more mhz to their cpus so 0 progress in architecture however new 8370e has lower power consumption.

 

Logan results on cpu side are not reliable as they were not validated by any other reviewer out there. Reviewing stuff is not magic, if anandtech which is one of the best sources to find technology says the 8350 loses to the i5, why would i believe to logan who says the 8350 "beats" the i7?? And remember what cpu logan uses on his personal computer...

 

Its pretty clear for all that he only made that video so AMD fanboys could find a refugee and stop crying 

[patrickjp93]

Sure thing.

You are completely off. Do you known why Intel is tryly ahead? It is because of their predictions system is so advanced compared the the rest of the industry and their cache-system.

Today it is about having the resource ready before you even need them. This is why a good prediction system compared with OoO is incredible expensive.

Also hence why we see inorder architecture on low cost processors. It is simply to expensive to implement those parts.

I'm not talking about cache alone, it is the entire cache-sub-system.

It is not implementing execution units that is expensive, it is implementing systems to keep those units fed that is expensive.

Yes their branch prediction is the best in the industry, but they also have fewer cycles per instruction thanks to having the very best FPU and extremely advanced control logic. Did you know it's all the control logic that makes Haswell run so hot? 4 ALU clusters and all the intercommunoication and controls are why it's so hot.

 

IOP is simpler to build optimizing compilers for. OOP is not difficult to implement. and if Intel licensed the design of its branch predictor any chip maker in the world could do it for cheap. 

 

The very last line in some ways agrees with me. The pipeline/control logic takes up more die space than the actual compute resources, but it is only because you have so many resources that the control logic is so huge, as it grows exponentially with the number of resources you have to track. Of the compute units which are more difficult to feed and control, the FPU is the big one. And Intel's cache system is cheap, but there's a lot of it. Fully associative cache is actually the simplest one to implement. AMD picked a unassociative (no redundant/continuous data from L1 in L2 or L3) cache structure on Vishera which was actually more expensive to implement per KB due to all the advanced data tracking required to keep it all in order. The TLB Intel uses is quite simple too, but it's fast. AMD's is very complicated and slow.

 

It's all these factors together which make AMD's chip designs inferior, not to mention being on a much higher process node. Thankfully Jim Keller should fix that after Excavator has landed and we can end the CMT idiocy.

[patrickjp93]

He does say that he was using the MSI 970 mobo, it will be interesting to see what he gets with the 990FX board he was going to test with, if there is any difference.

As for the Intel and AMDs 8 core if your going for gaming it doesn't matter to much what you pick for today's games.

Although I am disappointed with AMDs refresh, I'm looking forward to the money off though

AMD investing in low-power states to save on TDP was a wise decision, but it needs to come to the new architectures in a very big way. Carrizo mobile and server both need to be much lower TDP than Intel's lineup if the performance can't immediately match and it will take architects time to squeeze the performance out of HSA.

[vm'N]

Yes their branch prediction is the best in the industry, but they also have fewer cycles per instruction thanks to having the very best FPU and extremely advanced control logic. Did you know it's all the control logic that makes Haswell run so hot? 4 ALU clusters and all the intercommunoication and controls are why it's so hot.

IOP is simpler to build optimizing compilers for. OOP is not difficult to implement. and if Intel licensed the design of its branch predictor any chip maker in the world could do it for cheap.

The very last line in some ways agrees with me. The pipeline/control logic takes up more die space than the actual compute resources, but it is only because you have so many resources that the control logic is so huge, as it grows exponentially with the number of resources you have to track. Of the compute units which are more difficult to feed and control, the FPU is the big one.

Sorry for the late reply.

I'm not only talking about the branch predictor, but also talking about its how it prefetch the instruction and necesary data elements. Intels way of looping the element into the cache, making it availabe to the core.

I'm arguing that the FPU alone is quite inexpensive.

The expensive part is keeping the EUs filled with the necessary data.

Intel also have a tighter integrated SIMD/FPU than any other in the industry.

In ordre architecture is simpler to optimize. However it also require less diespace and will therefore consume less power and cost less to produce. However scaling performance gets tricky without something like OoO or code morphin of some sort.

It is not the actual EUs that are expensive. It is all the preparation to keep them fed.