Intel Making a HEDT Comeback??? W790 Sapphire Rapids Workstation & HEDT CPU Platform Detailed

[leadeater]

50 minutes ago, porina said:

Now I'm not so sure. I've seen performance scaling in one title where 12 cores continued to give improvement over 8.

Was that Intel or AMD? Could well be performance increase from extra cache and bandwidth to cores from having more than one CCD. Knowing if it's just from more cores can be quite the challenge. 

[porina]

1 minute ago, leadeater said:

Was that Intel or AMD? Could well be performance increase from extra cache and bandwidth to cores from having more than one CCD. Knowing if it's just from more cores can be quite the challenge. 

Intel, 7920X specifically. Testing was by turning off cores to test at each core count (HT on/off also). There may be an argument that the 7920X being relatively old now doesn't have nearly as much performance per-core as current CPUs, so newer CPUs might not have scaled so wide. Total cache reported remained constant in CPU-Z, but I didn't verify.

 

Personally I don't want to be dealing with AMD's CCDs any more if I can help it. That is why I never considered Threadripper at all for a HEDT build, while AMD still made them.

[leadeater]

45 minutes ago, porina said:

Personally I don't want to be dealing with AMD's CCDs any more if I can help it. That is why I never considered Threadripper at all for a HEDT build, while AMD still made them.

I don't know why you dislike that so much because at least when it comes to benchmarks and general performance it has no negative impact. I get that you don't like it theoretically but I've never seen it matter much at all.

 

You even get more performance with more CCDs and AMD charge more for SKUs with more CCDs than less with the same core counts.

[porina]

2 minutes ago, leadeater said:

I don't know why you dislike that so much because at least when it comes to benchmarks and general performance it has no negative impact. I get that you don't like it theoretically but I've never seen it matter much at all.

My usage is multi-purpose. It doesn't affect everything, but if I don't have to worry about it for the things it does impact, that helps.

 

For the compute use case I have, I have to treat each CCX as if it is its own little sub-CPU. Moving data in or out of the CCX cripples performance. Windows scheduler doesn't get that right either, and I have to use Process Lasso to prevent the tasks moving around. The last AMD desktop CPU I owned was a 3700X. I had to use that as if it were two 4 core CPUs to maximise performance. Life got better when I got rid of it. I'd still prefer monolithic-like CPUs where possible. It might not be an option forever, but I'll deal with it when I have to. Even what we know of Meteor Lake doesn't sound like it will have AMD chiplet style negatives from my perspective, as it doesn't look like they're breaking up the cores, yet. 

 

The increase in size of a CCX to that of a CCD with Zen 3 helped move that pain point up but I can't seriously consider a current AMD CPU with more than 8 cores, and I now consider 8 cores to be too low level for a future build. I had considered 7800X3D before then. If AMD further increases a CCD to beyond 8 cores, I'd consider them again. Or alternatively, if AMD reduced the L3 cache size and instead implemented a unified L4, that would possibly work better for me. L4 could be a V-cache stack on top of IOD for example. I'd still have concerns about the adequacy of Infinity Fabric even if they were to go this arrangement, especially in DDR5 era.

 

I was going to bring up gaming, but my memory may be a bit off. Maybe it affected Zen 2 more, and the bigger CCX from Zen 3 combined with updates to Windows scheduler largely mitigated that pinch point. I found some Zen 3 testing going from 6 core to 16 core, and games either fall into one of two groups: didn't scale at all, or scaled with more cores. I didn't see the expected dip from going 1 CCD to two. Still at least that did back up my earlier observation some games can scale beyond 8 cores, now seeing it applies even on AMD.

 

2 minutes ago, leadeater said:

You even get more performance with more CCDs and AMD change more for SKUs with more CCDs than less with the same core counts.

More CCDs are more cost, plus to the user you get the cache from each CCD helping out. Still, it wont apply to every workload. We buy for what works for us individually. Right now AMD is not in a great position for my needs.

[leadeater]

1 hour ago, porina said:

The last AMD desktop CPU I owned was a 3700X. I had to use that as if it were two 4 core CPUs to maximise performance.

Ah, I was wondering if the last one you used was the dual CCX arch. Zen 3 was a significant improvement and the change to single CCX pretty much eliminated those types of problems.

 

It's why I didn't change over our ESXi hosts until EPYC 7003 generation.

 

Going between CCXs in the same CCD required going back to the IOD then back again, super weird.

 

1 hour ago, porina said:

The increase in size of a CCX to that of a CCD with Zen 3 helped move that pain point up but I can't seriously consider a current AMD CPU with more than 8 cores, and I now consider 8 cores to be too low level for a future build

I would recommend you find a way to try one, not buy it of course. But if you can get hands on I suspect you'll find it's not an issue for you anymore.

 

1 hour ago, porina said:

if AMD reduced the L3 cache size and instead implemented a unified L4, that would possibly work better for me. L4 could be a V-cache stack on top of IOD for example

The L3 cache is already cache coherent so I doubt there would be much benefit in a chaplet design. The L4 cache would have to be in the IOD and that wouldn't really help much other than save a few ns in access time.

 

1 hour ago, porina said:

L4 could be a V-cache stack on top of IOD for example. I'd still have concerns about the adequacy of Infinity Fabric even if they were to go this arrangement, especially in DDR5 era

That shouldn't be a concern when talking about caches. If you put L4 cache in the IOD then every CCD adds bandwidth to that cache, less CCDs in that situation is worse. I would rather have 4 CCDs with 4 active cores than 2 CCDs with 8 active cores. It's also the same for the L3 caches even, more CCDs mean more L3 cache bandwidth within the SoC leading to more performance. That's why the HPC optimized EPYC 7003 SKUs all used the maximum number of CCDs as did the V-Cache SKUs.

 

1 active for per CCD 

 

Basically what I'm saying is I don't think you should be so quick to dismiss without having tried it and Zen 2 being so significantly different to Zen 3 & 4. But that's not a recommendation to buy them since current Intel options are just as performance completive anyway, or better.

[porina]

8 hours ago, leadeater said:

Going between CCXs in the same CCD required going back to the IOD then back again, super weird.

We had that discussion in another thread. Regardless of how it technically works through the generations, the reality is if the data isn't on the local CCX, perf sucks for me.

 

8 hours ago, leadeater said:

I would recommend you find a way to try one, not buy it of course. But if you can get hands on I suspect you'll find it's not an issue for you anymore.

I said that was my last AMD desktop CPU. I currently have a 5800H in laptop, but at only 8 cores it is unified and doesn't have any fragmentation problems.

 

8 hours ago, leadeater said:

The L3 cache is already cache coherent so I doubt there would be much benefit in a chaplet design. The L4 cache would have to be in the IOD and that wouldn't really help much other than save a few ns in access time.

That suggestion would have made more sense in DDR4 era, but I think the bottleneck has shifted somewhat from ram to IF with Zen 4, at least based on what AMD has said in public. Don't think I've seen a useful deep dive anywhere yet.

 

8 hours ago, leadeater said:

Basically what I'm saying is I don't think you should be so quick to dismiss without having tried it and Zen 2 being so significantly different to Zen 3 & 4. But that's not a recommendation to buy them since current Intel options are just as performance completive anyway, or better.

Even if I don't have 1st hand experience of them, others with similar interests to mine have bought them. With two CCD Zen 3 they encountered exactly the same problems as two CCX on Zen 2, with the same workarounds. Nothing has changed apart from the cores getting ~10% IPC for AVX workloads, and the bigger CCX pushing the problem up the range. Based on what we know of Zen 4, again I don't think anything has changed apart from getting AVX-512. That was what sold me on them, as initial results suggested the IPC of Zen 4 sat somewhere between RKL and SKX, which is really good. But I want one CPU, not multiple fragments of one. Lack of AVX-512 is what's putting me off consumer Intel, so it falls to WS as my last hope for a great CPU, rather than choosing other tradeoffs.

 

Anyway, until such time the WS range is fully announced the old 7920X is still sufficient.

[leadeater]

11 hours ago, porina said:

With two CCD Zen 3 they encountered exactly the same problems as two CCX on Zen 2, with the same workarounds. Nothing has changed apart from the cores getting ~10% IPC for AVX workloads, and the bigger CCX pushing the problem up the range.

Why do you have so much communication between cores? That itself seems like massive problem in itself.

[porina]

1 hour ago, leadeater said:

Why do you have so much communication between cores? That itself seems like massive problem in itself.

The cores don't talk to each other directly other than for some coordination, but they work on the same data set when running multi-thread. AVX can chew through a LOT of data fast. That's why it is important to have the data on hand. Multiple passes are made over the whole data set in various patterns so you can't chop it into independent pieces to spread more widely. Smarter people than I have spend decades optimising this stuff. If there is a better way to do it, there would be a lot of people who would want to know.

 

To be clear, Zen 4 CPUs can still offer great throughput in the use case. The difference compared to monolithic is you have to do a lot more optimisation, and it is a moving target. A monolithic CPU makes it a lot easier. The two CCD 3D parts not being equal also makes that a more complicated optimisation.

 

For this specific use case, an Intel 16 core CPU like those in OP would probably offer the best throughput in most but not all use cases. 2nd place overall would be a 16 core Zen 4 CPU, and 3rd would be Intel consumer tier lacking AVX-512, although I don't have data on hybrid CPUs to know exactly where they end up. It would also be an optimisation nightmare. 16 core Zen 4 could still overtake an Intel 16 core WS in specific scenarios from having more overall cache.

[leadeater]

10 minutes ago, porina said:

so you can't chop it into independent pieces to spread more widely. Smarter people than I have spend decades optimising this stuff. If there is a better way to do it, there would be a lot of people who would want to know.

Ah, so the problem comes from the L3 cache being split across CCD (CCX)s?

[porina]

47 minutes ago, leadeater said:

Ah, so the problem comes from the L3 cache being split across CCD (CCX)s?

Yes, again I'm sure we went through this in another thread. Data that isn't in the local L3 might as well be in ram. If only this stuff scaled like Cinebench  

[leadeater]

6 minutes ago, porina said:

Yes, again I'm sure we went through this in another thread. Data that isn't in the local L3 might as well be in ram. If only this stuff scaled like Cinebench  

Yea I know we have talked about it before, just don't think we actually covered where the problem actually was. I hope AMD move to a new chip interconnect technology because I think that will greatly remove the problem. TSMC have that, I think the AMD GPUs are using one of them that offers much high bandwidth it's just much more expensive.

 

Intel's EMIB/Feveros is much higher bandwidth than IF in the CPUs so if/when Intel start separating compute it should be less of a problem.

[leadeater]

15 minutes ago, porina said:

Yes, again I'm sure we went through this in another thread. Data that isn't in the local L3 might as well be in ram. If only this stuff scaled like Cinebench  

Oh that also reminds me, with Zen 4 and EPYC/Genoa there are SKUs with double GMI links to the CCD. I wonder how those would fair.

[CommanderAlex]

UPDATE: So wccftech has an article that came out on Feb 6 with a leak of the Xeon W7-3455 24-Core CPU tested on V-Ray 5 benchmark, scoring 26.2K on multi-core. For comparison, a 13900K scored 28.9K and a Threadripper 5965WX scored 30.7K. 

 

That's pretty disappointing if the Xeon is performing lower than a 13900K.

 

https://wccftech.com/intel-xeon-w7-3455-sapphire-rapids-workstation-24-core-cpu-tested-slower-than-threadripper-5965wx/

[HenrySalayne]

33 minutes ago, CommanderAlex said:

UPDATE: So wccftech has an article that came out on Feb 6 with a leak of the Xeon W7-3455 24-Core CPU tested on V-Ray 5 benchmark, scoring 26.2K on multi-core. For comparison, a 13900K scored 28.9K and a Threadripper 5965WX scored 30.7K. 

 

That's pretty disappointing if the Xeon is performing lower than a 13900K.

 

https://wccftech.com/intel-xeon-w7-3455-sapphire-rapids-workstation-24-core-cpu-tested-slower-than-threadripper-5965wx/

 

It's 3x the P cores, has no E cores (13900K has 16!) and base frequency (if this metric is anything to go by nowadays) is roughly 50% of the 13900k's all-core boost.

So if these CPUs are more than the CPUs we had just a few years ago (base clock = all core boost clock) it's not really surprising.

 

BTW: data sheets are not even worth the paper they are printed on. The 13900K has a P core "base frequency" of 3 GHz but even with an all-core load it is close to 5 GHz. Why?

[porina]

20 minutes ago, HenrySalayne said:

BTW: data sheets are not even worth the paper they are printed on. The 13900K has a P core "base frequency" of 3 GHz but even with an all-core load it is close to 5 GHz. Why?

It seems TDP and base frequency are still not well understood. A short version of Intel's definition is that if you have a cooling solution of "TDP W" then Intel will guarantee your CPU will run at least at base clock. If you have better cooling and a higher power limit set, you can turbo much above base frequency. AMD's works much the same.

[HenrySalayne]

2 hours ago, porina said:

It seems TDP and base frequency are still not well understood. A short version of Intel's definition is that if you have a cooling solution of "TDP W" then Intel will guarantee your CPU will run at least at base clock.

So you are telling me a CPU running 30% slower than this review sample would still be in spec? Great! If you artificially lower the base clock, even a complete turd ends up in the 13900k bucket. So all published benchmarks are worthless because review outlets received hand-picked CPUs. Honestly, if Intel publishes nonsense numbers, reviewers should take them by their word and just run all benchmarks at base speed. Because that's the bar Intel guarantees for their costumers.

(Source)

[porina]

12 minutes ago, HenrySalayne said:

So all published benchmarks are worthless because review outlets received hand-picked CPUs.

I don't follow your logic. Everything you just said applies similarly to AMD. Neither Intel or AMD will guarantee you will hit specific peak turbo clocks. CPU performance will depend on multiple factors. The base clock definition is just one of them, and irrelevant to a typical enthusiast build with high end cooling.

[HenrySalayne]

1 hour ago, porina said:

I don't follow your logic. Everything you just said applies similarly to AMD. Neither Intel or AMD will guarantee you will hit specific peak turbo clocks. CPU performance will depend on multiple factors. The base clock definition is just one of them, and irrelevant to a typical enthusiast build with high end cooling.

The 7950X (same class as the 13900K) has an advertised base clock of 4500 MHz, 50% more compared to the 13900K. That's a realistic base clock while 3 GHz for the 13900K is a joke, or is it? If they sent out hand-picked review samples easily hitting 4500 MHz all-core with 125W, are these samples the exception and you'll find lower quality silicon on store shelves which is not even close to these numbers? Or what advantage could Intel possibly have from under-reporting the base clock?

 

 

[porina]

4 minutes ago, HenrySalayne said:

The 7950X (same class as the 13900K) has an advertised base clock of 4500 MHz, 50% more compared to the 13900K. That's a realistic base clock while 3 GHz for the 13900K is a joke, or is it? If they sent out hand-picked review samples easily hitting 4500 MHz all-core with 125W, are they the exception and you'll find lower quality silicon not even close to these numbers on store shelves? Or what advantage could Intel possibly have from under-reporting the base clock?

Look back at the definition I gave. You get at least base clock with a cooling solution rated to TDP. Most workloads are not worst case. Run worst case and you'll likely see lower clocks. Temperature has an influence too. This is not about power consumption of the CPU. Setting a 125W limit does not mean it will drop to base clock.

 

Turbo clocks on the other hand are a maximum, and are not guaranteed by Intel or AMD. Yes, you could have a good or bad sample which may boost a but more or less than a better one in otherwise identical test conditions. Silicon lottery.

[HenrySalayne]

1 hour ago, porina said:

Look back at the definition I gave. You get at least base clock with a cooling solution rated to TDP. Most workloads are not worst case. Run worst case and you'll likely see lower clocks. Temperature has an influence too. This is not about power consumption of the CPU. Setting a 125W limit does not mean it will drop to base clock.

 

Turbo clocks on the other hand are a maximum, and are not guaranteed by Intel or AMD. Yes, you could have a good or bad sample which may boost a but more or less than a better one in otherwise identical test conditions. Silicon lottery.

I certainly understood the definition. But they could print 1 GHz on their data sheet and it would still be correct. Base clock should not be an artificially chosen small number but represent an actual realistic value. It have not seen any testing achieving 3 GHz for the 13900K.  You would probably have a hard time finding a workload and a cooler to actually get the 13900k clocking down to 3 GHz. With 125W and no thermal throttling of course.

That's why I said base clock is a worthless (and artificial) metric, doesn't matter anymore and they can stop printing it.

 

[porina]

3 minutes ago, HenrySalayne said:

I certainly understood the definition. But they could print 1 GHz on their data sheet and it would still be correct. Base clock should not be an artificially chosen small number but represent an actual realistic value.

You want a number to mean something other than what is actually really means. Most often I see this about TDP and it is kind of another aspect of the same.

 

You might as well also argue the other direction that turbo clocks are even more meaningless as they are not guaranteed to be hit at all. At least base clock is guaranteed.

 

TDP and base clock are engineering definitions. If you want meaningless typical values, that's marketing.

 

3 minutes ago, HenrySalayne said:

It have not seen any testing achieving 3 GHz for the 13900K.  You would probably have a hard time finding a workload and a cooler to actually get the 13900k clocking down to 3 GHz. With 125W and no thermal throttling of course.

This IS about thermal limiting, which is why I said power limit doesn't matter. I don't know if any of the Intel stock coolers are rated at 125W but slap something like that on and run Prime95 would probably get you close. There are probably other things like environmental factors to be taken into consideration.

 

3 minutes ago, HenrySalayne said:

That's why I said base clock is a worthless (and artificial) metric, doesn't matter anymore and they can stop printing it.

You are welcome to say it doesn't apply to your needs. If you wish for other information you'll have to find other ways to obtain it, and not changing something that has a defined meaning.

[alex75871]

I hope a more affordable MB comes with 8 memory slots and ATX.

[HenrySalayne]

18 hours ago, porina said:

It seems TDP and base frequency are still not well understood. A short version of Intel's definition is that if you have a cooling solution of "TDP W" then Intel will guarantee your CPU will run at least at base clock.

12 hours ago, porina said:

This IS about thermal limiting, which is why I said power limit doesn't matter. I don't know if any of the Intel stock coolers are rated at 125W but slap something like that on and run Prime95 would probably get you close. There are probably other things like environmental factors to be taken into consideration.

What do you mean power limit doesn't matter? If you pump 125W into a CPU, 125W of heat will come out. It's quite simple.

 

This is the base clock and TDP definition up to the 11900K:

This is the "processor base power" definition for the 12900K and 13900K:

Which means everything falls into the 13900K bin that does not exceed 125W at 3 GHz (P cores, 2.2 GHz E cores) with the Intel-specified high complexity workload.

So the converse argument then says that every processor running with a power limit of 125W at more than 3 GHz with a high complexity workload is better than the baseline (or better than the worst 13900Ks to hit the market).

I don't have a 13900K, but I suspect the review samples going around should exceed 3 GHz in this scenario by a lot. I don't expect a 7950X to be far off 4500 MHz with a high complexity workload at 170W. The worst 32 thread prime95 test pushes my 125W 7950X to around 4150 MHz (air-cooled at 90°C average).  Referring to the table of these two CPUs at different power settings, the 13900K should be close and not at 3 GHz.

 

Seeing the review samples exceeding the minimum spec by this amount does not fill me with confidence. You want a small deviation from each 13900K to the other and not a 30% performance difference. I have not seen costumers complaining about their 13900K performing poorly, so there are probably not many borderline minimum spec processors in the wild. Nevertheless, Intel has reduced the base clock year after year (the 7700K was at 4.2 GHz, the 12900K was at 3.2 GHz) while they also increased the maximum boost frequency year after year. And both values are more and more detached from reality. If you're printing something onto the data sheet that literally has no meaning for using the product, just don't even print it and find a more sensible metric.

[porina]

53 minutes ago, HenrySalayne said:

What do you mean power limit doesn't matter? If you pump 125W into a CPU, 125W of heat will come out. It's quite simple.

The scenario here is that you have a cooling solution good for 125W. Under a sustained tough workload you reach thermal limit. This spec is saying you will not drop below 3 GHz in this condition. You can be above that. It is not the same as applying a 125W limit.

 

While not the same thing, I think another example of workloads varying quite a lot is running on my old 3700X. This runs on a fixed power limit by default (PPT=88W, or 35% above TDP). It was a long time ago so I can't remember the exact numbers, but a light workload like Cinebench R15 would let the CPU run something like 4.2 GHz. Now repeat that with Prime95 and it drops to 3.8 GHz.

 

53 minutes ago, HenrySalayne said:

If you're printing something onto the data sheet that literally has no meaning for using the product, just don't even print it and find a more sensible metric.

It is for a type of "user": system builders, not so much end users.

 

Just for you, I dug up an old interview with a person involved with defining it in the first place, and I think he does a better job of describing it than I can. I'd suggest going through the whole piece for wider context.

Quote

TDP is an average power dissipation at a maximum junction temperature operating condition limit, specified in Intel’s engineering datasheet for that processor, for which the processor is validated during manufacturing and when executing an associated Intel-specified high complexity workload at that frequency. What that means is when we quote a base frequency, we think about a worst case environment and a real world high-complexity workload that a user would put on the platform – when the part is run at a certain temperature, we promise that every part you will get will achieve that base frequency within the TDP power. So that’s what it is – it allows our customers, our ODM customers, and the manufacturers, to know how much thermal capability and power delivery capability to implement in their systems so that they will get the base frequency, which we may have historically called our ‘marked’ frequency.

https://www.anandtech.com/show/14582/talking-tdp-turbo-and-overclocking-an-interview-with-intel-fellow-guy-therien

 

[leadeater]

2 hours ago, HenrySalayne said:

Seeing the review samples exceeding the minimum spec by this amount does not fill me with confidence. You want a small deviation from each 13900K to the other and not a 30% performance difference.

That is very much down to the motherboard. Even from the same brand/vendor different models use different default vcore and LLC setting so the exact same CPU carried across different boards will not have the same power and thermal characteristics. Good reviewers go in to the BIOS and configure the CPU as per Intel defined default specifications which "should" remove all these types of variabilities however you'd be surprised how not common it is to do this.

 

Using motherboard defaults does not align with standardized testing. It's "acceptable" enough but certainly does introduce inaccuracies and problems comparing between reviews.

 

3 hours ago, HenrySalayne said:

Nevertheless, Intel has reduced the base clock year after year (the 7700K was at 4.2 GHz, the 12900K was at 3.2 GHz) while they also increased the maximum boost frequency year after year.

This is simply necessary as the core counts increase. CPU core power over the frequency curve is non-linear so it's simply unrealistic to maintain the same base frequencies as a CPU with 4 cores than one with 8/12/16/24 etc. It's also completely unnecessary to do that expelling far more heat and use more power than is necessary. It's not like when you are actually using your computer that the CPU spend any amount of time at base clocks so it's legitimately not worth worrying about.

 

A more important factor to look at is the PL1 and PL2 allow power and the number of cores. Two equal core configuration CPUs with different PL1 and PL2 settings will perform differently and is a critical specification to look at when buying Intel Xeon and AMD EPYC processors, where due to even more cores this factor is even more important.

 

Base frequencies and TDP specifically are fairly useless specifications to look at. One is a state that never happens and the other is for thermal design solutions and is not a direct representation of power. Intel actually has direct defined power specifications in the full technical documentation and those are PL1 and PL2, along with other related specifications.

 

It's also VERY important to remember these values are configurable. If I want a 13900K to only ever use a maximum of 65W then I can set both PL1 and PL2 to 65W then it shall never use more than 65W. Modifying these values is common on laptops and small formfactor desktop/NUCs.

 

Realistically unless you are interested in all these deeper technical details for the more part it's better to ignore the majority of the CPU spec sheets other than the really basic stuff like number of cores and boot frequencies. After that go look at product reviews because those will give far better understanding and a better picture of what to actually expect. Comparing a 12900K vs 13900K just via the product spec sheets and even the full technical documentation isn't actually going to be all that enlightening for an end user wanting to know how the product performs and acts.