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Of course im speaking in general terms, I had a look at why it would be a while ago and remember being like typ im not gonna get any of this and didnt read much into it

 

Also when was the last gpu die shrink?

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more transistors, smaller area, higher efficiency because of less energy loss, as well as optimizations in the new process

this gives more room for stuff like cache and iGPU too

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Better power/performance ratio, as well as being able to fit more transistors on the same size die. Also, some other random stuff wich I'm too lazy to google.

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Lesser power draw, faster switching of the transistors, and the ability to possibly cram more transistors into the same previous die area as before.

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Just now, Enderman said:

more transistors, smaller area, higher efficiency because of less energy loss, as well as optimizations in the new process

this gives more room for stuff like cache and iGPU too

This is where I dont get it. rather then srink the die wouldn't it be better to just put the same density of transistors on what would be the die srunk chip on the old die size? Surely that would be even more powerful then a smaller die with that density 

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8 minutes ago, Nexxus said:

Of course im speaking in general terms, I had a look at why it would be a while ago and remember being like typ im not gonna get any of this and didnt read much into it

 

Also when was the last gpu die shrink?

Right now with Polaris and Pascal. If you mean out right now it was 2011 and we are still rocking the same nm since then

ƆԀ S₱▓Ɇ▓cs: i7 6ʇɥפᴉƎ00K (4.4ghz), Asus DeLuxe X99A II, GT҉X҉1҉0҉8҉0 Zotac Amp ExTrꍟꎭe),Si6F4Gb D???????r PlatinUm, EVGA G2 Sǝʌǝᘉ5ᙣᙍᖇᓎᙎᗅᖶt, Phanteks Enthoo Primo, 3TB WD Black, 500gb 850 Evo, H100iGeeTeeX, Windows 10, K70 R̸̢̡̭͍͕̱̭̟̩̀̀̃́̃͒̈́̈́͑̑́̆͘͜ͅG̶̦̬͊́B̸͈̝̖͗̈́, G502, HyperX Cloud 2s, Asus MX34. פN∩SW∀S 960 EVO

Just keeping this here as a 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You can cram more stuff in the same space, therefore a chip of the same size can contain a lot more components and be much faster. At the same time a chip with the same amount of parts will draw less power.

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1 minute ago, Nexxus said:

This is where I dont get it. rather then srink the die wouldn't it be better to just put the same density of transistors on what would be the die srunk chip on the old die size? Surely that would be even more powerful then a smaller die with that density 

its not all about cramming as many transistors as possible onto it

its about optimizing the architecture and making the same amount of transistors perform better while reducing power consumption and cost

fitting more chips onto a silicon wafer makes the manufacturing cost cheaper too

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9 minutes ago, Enderman said:

its not all about cramming as many transistors as possible onto it

its about optimizing the architecture and making the same amount of transistors perform better while reducing power consumption and cost

fitting more chips onto a silicon wafer makes the manufacturing cost cheaper too

And makes it easier to bin for various price brackets,

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Up until 28nm, die shrinks were mainly performed because it made technology cheaper from getting more potential chips out of a wafer of a fixed size. In other words, you could get more chips by using a 20nm process than if you used a 32nm process on a 300mm wafer. Now because of the law of diminishing returns, the R&D of developing smaller processes is exceeding the cost savings from them.

One main benefit still remains from die shrinks in the form of improved power consumption. By having transistors closer to each other, you reduce the overall amount of voltage it takes for energy to flow in the chip.

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