Ampere Altra M128-30 Review: 128 ARM cores on a single die

[ScratchCat]

Summary

Ampere has released their new ARM based CPU lineup sporting up to 128 cores on a single die on TSMC's 7nm node. Ampere's first generation Q80-33 had up to 80 of Arm's Neoverse-N1 cores clocked at 3.3 GHz along with 32MB of L3. The M128-30 adds 60% more cores but clocks 300MHz lower at 3GHz and halves the L3 cache to 16MB.

 

Inter-socket communication has improved drastically over the previous generation, reducing latency by a third.

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The results are that socket-to-socket core latencies have gone down from ~350ns to ~240ns, and the aforementioned core-to-core within a socket with a remote cache line from ~650ns to ~450ns – still pretty bad, but undoubtedly a large improvement.

 

Workloads without large memory bandwidth needs see good scaling with the extra cores despite the lower clockspeed.

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Workloads such as 525.x264_r, 531.deepsjeng_r, 541.leela_r, and 548.exchange2_r, have one large commonality about them, and that is that they’re not very memory bandwidth hungry, and are able to keep most of their working sets within the caches. For the Altra Max, this means that it’s seeing performance increases from 38% to 45% - massive upgrades compared to the already impressive Q80-33.

 

Memory bandwidth hungry workloads are held back by the tiny 16MB cache (Epyc has 256MB for 64 cores) with some applications performing worse than on an equally clocked Q80-33.

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505.mcf_r is the worst-case scenario, although memory latency sensitive, it also has somewhat higher bandwidth that can saturate a system at higher instance count, and adding cores here, due to the bandwidth curve of the system, has a negative impact on performance as the memory subsystem becomes more and more inefficient. The same workload with only 32 or 64 instances scores 83.71 or 101.82 respectively, much higher than what we’re seeing with 128 cores.

 

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In the FP suite, we’re seeing a same differentiation between the M128-80 and the other systems. In anything that is more stressful on the memory subsystem, the new Mystique chip doesn’t do well at all, and most times regresses over the Q80-33.

 

In anything that’s simply execution bound, throwing in more execution power at the problem through more cores of course sees massive improvements. In many of these cases, the M128-30 can now claim a rather commanding lead over the competition Milan chip, and leaving even Intel’s new Ice Lake-SP in the dust due to the sheer core count and efficiency advantage.

 

Single thread performance actually regresses relative to the Q80-33 due to the combination of lower clockspeed and half the L3

 

Overall the new chip isn't clearly better than the previous generation, providing massive improvements in some workloads but kneecapping performance in anything which requires more cache per core.

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The Altra Max is a lot more dual-faced than other chips on the market. On one hand, the increase of core count to 128 cores in some cases ends up with massive performance gains that are able to leave the competition in the dust. In some cases, the M128-30 outperforms the EPYC 7763 by 45 to 88% in edge cases, let’s not mention Intel’s solutions.

On the other hand, in some workloads, the 128 cores of the M128 don’t help at all, and actually using them can result in a performance degradation compared to the Q80-33, and also notable slower than the EPYC competition.

 

My thoughts

The M128-30 seems quite impressive on paper, 128 N1 cores at 3 GHz with a TDP of 250W. Single thread performance wasn't terrible on the Q80-30 so this should have been a real threat to Epyc. However the 16MB L3 drags down performance in memory intensive workloads, sometimes below the performance of the older Q80-33. Compute heavy and cost sensitive workloads are the likely target here with two chips costing 25% less than Epyc CPUs with a similar level of performance.

 

Source

https://www.anandtech.com/show/16979/the-ampere-altra-max-review-pushing-it-to-128-cores-per-socket

[GDRRiley]

weird chip, they cut the cache but added cores, this feels to me like its targeted at something like web hosting not general purpose compute

[GDRRiley]

Just now, valdyrgramr said:

Well ya, the benches are against xeons and epycs.  It's for servers, deep learning, etc.

yeah I know that but it doesn't seem like it fits an HPC workload very well and its overall server placement is mixed. for the right workloads it fights with EPYC 7003 or it loses to epyc 7002

[Doobeedoo]

Dem cores.

 

I want to see the new ARMv9 performance Cortex cores how they'll improve.