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Why is it becoming harder to make transistors smaller?

Computernaut

I get the impression that it has something to do with the inherent properties of silicon, but what is it specifically?

I've heard that carbon has been touted as a possible alternative; why? Does it have something to do with the fact that both of these bond four times? What is preventing processors from being made of carbon now?

What is actually supposed to go here? Some people put their specs, others put random comments or remarks about themselves or others, and there are a聽few who put cryptic statements.

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Well, think about the 7nm process. Think how insanely small that is. You probably can't. But to put it in perspective, atoms range between 0.1 and 0.5nm across.

Which means at 7nm, you've got at most, about 70 atoms across to work with. You gotta make a transistor out of that minute amount of matter, it's actually insane.

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14 minutes ago, Computernaut said:

I get the impression that it has something to do with the inherent properties of silicon, but what is it specifically?

I've heard that carbon has been touted as a possible alternative; why? Does it have something to do with the fact that both of these bond four times? What is preventing processors from being made of carbon now?

You start to get electrons jumping all over the place the smaller you try to go, most of the "7nm" "5nm" ect processes aren't even truly that size.

I edit my posts a lot, Twitter is @LordStreetguru just don't ask PC questions there mostly...

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19 minutes ago, Streetguru said:

You start to get electrons jumping all over the place the smaller you try to go, most of the "7nm" "5nm" ect processes aren't even truly that size.

Why do they jump?

What is actually supposed to go here? Some people put their specs, others put random comments or remarks about themselves or others, and there are a聽few who put cryptic statements.

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This article is a good read if you're interested.聽It goes into some聽detail regarding聽CPU architecture and how聽it's聽becoming increasingly difficult to shrink the process.

Quote

Photolithography


Also referred to as optical lithography or UV lithography,Photolithographyis used to put the design of a processor onto a substrate. By using multiple masks, light can be applied to, and blocked from, specific areas of a wafer, which has been treated with a photo-sensitive chemical.

Depending on the chemicals and processes used, the technique can etch away the pattern from the wafer or enable for other elements to be applied to the material instead. The technique is advantageous, as it can be used to mass produce considerable numbers of chips on a single wafer, and with minimal interaction with the on-wafer chips during the entire process.

An example of a wafer used to produce Intel's Xeon E7 processor in 2015, with the processor itself for scale.

An example of a wafer used to produce Intel's Xeon E7 processor in 2015, which uses photolithography in its creation, with the finished processor itself for scale.


While established, the technique has its problems, such as modern chips needing more than 50 different mask passes as part of its production, with the higher number of masks increasing the possibility of a manufacturing flaw, and in turn wasting the expensive wafer. There is also the limitation from the use of a laser as a light source, as current practicable versions work at too long a wavelength for it to be practicable at extremely small sizes that processor production now calls for.

To work around this, companies are now looking towards ways to refine the well-worn process for smaller and more complex dies.

Extreme Ultraviolet Lithography



The technique ofExtreme Ultraviolet Lithography(EUL) is seen to be the key to future die shrinks, with the technique relying on a completely different light source. While still using a laser, it is in fact used to excite tin or xenon plasma under vacuum to provide light at a wavelength of 13.5 nanometers, far lower than the 193nm-or-more wavelengths used in the above process.

This means that the light can be used with masks to provide a far higher potential resolution for chip production than previously possible. It may also offer other benefits, with Samsung suggesting inlate 2018that the process could use only one multi-patterning mask to develop one layer rather than four previously required, reducing the number of masks and production steps required.

While promising, EUL has so far yet to make it into commercial chip production lines in a significant way. The long development process of the technique still has its challenges that companies have to straighten out, as with any new processes that are just entering commercialization, but the performance rewards and potential cost savings from using it at scale are worth chasing by all involved.

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54 minutes ago, Computernaut said:

Why do they jump?

Because of quantum physics

I edit my posts a lot, Twitter is @LordStreetguru just don't ask PC questions there mostly...

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1 hour ago, Computernaut said:

Why do they jump?

The technical name for this phenomenon is Quantum Tunneling.

For our purposes, it can be explained quite simply. But you should be warned that what follows is an extreme oversimplification:

Whenever you have a wire, you have to have a certain thickness of insulation over that wire to prevent accidental connections between two wires that might be touching each other. Once this insulation gets too thin, the wires can start to "connect" to each other through the insulation.

Now, if we imagine a computer as a bunch of wires all run alongside each other, we can quickly see that this insulation must prevent accidental contact between the wires or else all sorts of things that shouldn't happen, would happen. However, in order for transistors to get smaller and smaller, the amount of insulation between them must also get smaller and smaller. At some point, this insulation becomes so thin that it is no longer capable of preventing the wires from accidentally connecting to each other.

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14 hours ago, straight_stewie said:

The technical name for this phenomenon is Quantum Tunneling.

For our purposes, it can be explained quite simply. But you should be warned that what follows is an extreme oversimplification:

Whenever you have a wire, you have to have a certain thickness of insulation over that wire to prevent accidental connections between two wires that might be touching each other. Once this insulation gets too thin, the wires can start to "connect" to each other through the insulation.

Now, if we imagine a computer as a bunch of wires all run alongside each other, we can quickly see that this insulation must prevent accidental contact between the wires or else all sorts of things that shouldn't happen, would happen. However, in order for transistors to get smaller and smaller, the amount of insulation between them must also get smaller and smaller. At some point, this insulation becomes so thin that it is no longer capable of preventing the wires from accidentally connecting to each other.

Can this not be fixed by decreasing the voltage?

What is actually supposed to go here? Some people put their specs, others put random comments or remarks about themselves or others, and there are a聽few who put cryptic statements.

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20 minutes ago, Computernaut said:

Can this not be fixed by decreasing the voltage?

That goes back to my warning that that was a gross oversimplification:

At the overwhelmingly tiny scales we are working at there are issues with how the particles actually move around between atoms, and we don't even fully understand what exactly is going on or why exactly it's happening.

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  • 2 weeks later...
On 1/4/2020 at 9:57 PM, Theguywhobea said:

Well, think about the 7nm process. Think how insanely small that is. You probably can't. But to put it in perspective, atoms range between 0.1 and 0.5nm across.

Which means at 7nm, you've got at most, about 70 atoms across to work with. You gotta make a transistor out of that minute amount of matter, it's actually insane.

The atomic radius of the silicon atom is 111 picometers. The diameter is double that, so 7nm is only 7000/222 ~= 31 atoms across.

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On 1/5/2020 at 11:29 AM, Computernaut said:

Can this not be fixed by decreasing the voltage?

Even if magically this reduces the quantum tunneling effect, the problem with smaller voltages is:

  • The noise floor for your signal has to be smaller, and there are a ton of things that can introduce noise. For example, if the signal has a noise floor of 0.5V +/- 0.1V, the absolute minimum you could set the voltage to is 0.6V, but even then you're skirting the edge of a massive amount of errors due to false positives.
  • If the processor requires a certain amount of work, or watts, to run, then lowering voltage means needing to increase the current to make up for it. High current however, increases the amount of heat generated dramatically.
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