VISC instruction set and Shasta processors with virtual cores

[Trixanity]

Soft Machines has created a new instruction set called Virtual Instruction Set Computing promising up to 4x the performance per watt compared to x86 and ARM competitors.

Quote

Current CPU architectures scale performance by using wider architectures and out-of-order execution to improve instruction-level parallelism (ILP) and by adding additional cores to improve thread-level parallelism (TLP). These techniques are limited by Amdahl’s law, however, leading to larger, more power-hungry processors. The challenges of multi-threaded programming, which is necessary to extract the full benefit of multiple CPU cores, also places limits on achieving high levels of TLP.

 

In order to improve performance/Watt scaling, Soft Machines is taking a different approach. Its architecture uses “virtual cores” (VC) that shift the burden of thread scheduling and synchronization from the software programmer and operating system to the hardware itself. With VISC, a single thread is not restricted to a single core like traditional multiprocessor designs. Instead, it gets broken down into smaller threadlets by the VCs and executes on multiple underlying physical cores (PC). By using the available execution units more efficiently, the VISC architecture, in theory, can maintain high performance even when using smaller, simpler physical cores, which reduces power consumption. Another advantage of this technique is that single-threaded applications can execute on multiple physical cores.

Soft Machines will use TSMCs 16nm process for their processors initially and will later transition to 10nm. There are several iterations in the making with a roadmap all the way to 2018. There will be both dual core and quad core models with up to twice the number of virtual cores. Later, a 10nm 8 core with 16 virtual cores will launch in 2018.

 

I can't imagine consumers seeing these processors at all. I suspect specialized use-cases. Or maybe smartphones will find a use, since they're supposedly very efficient and they do offer a single threaded performance that's allegedly twice that of Intel's Haswell/Skylake.

 

While these products supposedly support "guest ISAs", which I suppose means they could potentially implement some form of existing instruction sets, I still suspect that due to compatibility issues, they'll see limited use.

 

I don't know nearly enough about this stuff to make predictions or go into more details on the merits of these products.

It will be interesting nevertheless. Maybe they'll be acquired by one of the bigger players.

 

Source:

http://www.pcworld.com/article/2838018/stealthy-startup-soft-machines-launches-virtual-cpu-cores-that-trounce-traditional-processors.html

http://www.tomshardware.com/news/soft-machines-virtual-cores-visc,31127.html#topcomments_31127

[deviant88]

Awesome i was waiting for someone to come up with something like this, current manual programming of multithreaded apps is extremely hard we need this as standard since everyone is using multicore nowdays.

 

@patrickjp93  I said something like this is post a while ago got contradicted that its the programmers job to do it, well it turns out someone was actually working on it, it just makes sense to have native scaling across n-cores without manual complex multithreaded code.

[Sidiox]

Architectures like this could greatly help the shift to more mutltithreaded applications and systems. Although some of this still goes over my head, it looks pretty impressive. However I wonder if it will get adopted at all. 

[patrickjp93]

24 minutes ago, deviant88 said:

Awesome i was waiting for someone to come up with something like this, current manual programming of multithreaded apps is extremely hard we need this as standard since everyone is using multicore nowdays.

 

@patrickjp93  I said something like this is post a while ago got contradicted that its the programmers job to do it, well it turns out someone was actually working on it, it just makes sense to have native scaling across n-cores without manual complex multithreaded code.

Huh? OpenMP says hello. It's not that hard. You're just bad at it/behind the times.  No, the architecture will never outsmart the designer of the application. This will fade like every other new age muArch trend in the last decade.

[Trixanity]

6 minutes ago, patrickjp93 said:

Huh? OpenMP says hello. It's not that hard. You're just bad at it/behind the times.  No, the architecture will never outsmart the designer of the application. This will fade like every other new age muArch trend in the last decade.

I've seen you talking about OpenMP before and if I recall, it's an Intel creation. How open and/or compatible is it?

 

Intel only?
x86 only (including AMD)?
Can ARM or MIPS based stuff also use it for multi threading?

 

Genuinely curious since from what you've said: it's open, highly useful and efficient. So it seems odd that it would not have more wide-spread adoption. There must be a catch somewhere.

[patrickjp93]

Just now, Trixanity said:

I've seen you talking about OpenMP before and if I recall, it's an Intel creation. How open and/or compatible is it? Intel only? x86 only (including AMD)? Or can ARM or MIPS based stuff also use it for multi threading?

 

Genuinely curious since from what you've said. It's open, highly useful and efficient, so it seems odd that it would not have more wide-spread adoption. There must be a catch somewhere.

It went fully open standard around 2004 iirc. It's currently handled by its own standards consortium. Intel is a partner, but GCC and Clang have open-source implementations of it (meaning it works with any architecture those compilers choose to target). Contrary to popular belief Intel's been the spearhead of open source among the big silicon triad going back a decade or more.

 

I have OpenMP examples on blog posts here on LTT. The catch is 2-fold: Visual Studio only fully supports version 2.0 and select features of 3.0 and 4.0 (though most of the stuff you'd use for games is in 2.0 anyway), and the old guard developers don't like learning anything new.

[Prysin]

34 minutes ago, Sidiox said:

Architectures like this could greatly help the shift to more mutltithreaded applications and systems. Although some of this still goes over my head, it looks pretty impressive. However I wonder if it will get adopted at all. 

this is not a "architecture" its an instruction. Basically a "usermanual" for which paths the data should take inside the CPU

[Stefan1024]

Automatic / self-controlled parallelizing is programms has been the main goal of a lot of research groups all areound the world since more then 10 years.

I douped they figured out the "golden solution". First I need to see some benchmarks.

But if it's actually works, if would solve a LOT of problems in computing.

[azurezeed]

Sounds like something that was supposed to happen sooner than later