Help me understand!

[TechGod]

So, how exactly does a CPU work?

I know it has the control unit and the ALU.

I also know it uses different types of registers like how the storage register is used to store the result of an arithmetic operation or a logical calculation (correct me if I'm wrong) and a general register that does whatever the control unit tells it to as well but there's obviously a lot more I don't know. 

 

What is a Floating point unit? What exactly is it? I know that AMD's Bulldozer shared one FPU between two cores which proved to be a pretty big bottle neck. Why? 

 

If the core "modules" posed such an issue to AMD for performance, why couldn't they use a software implementation to "merge" two physical cores into one like how Intel is doing with reverse hyperthreading? 

 

Does every core get a control unit? Or is it more like there's one control unit for one CPU and then each core has its own ALU? If each core gets a control unit, wouldn't that introduce overhead? 

 

What exactly is an instruction set? I see talks of Intel implementing new instruction sets into their CPUs. How does that impact performance? Does it mean that new instruction sets means that the CPUs process the raw data they've been given in a better and more efficient manner?

 

 

Sorry for all these questions ( I have more, lol) but YouTube was no help and I think I want to be a CPU architect one day:D

 

 

[Enderman]

this answers all your questions

https://en.wikipedia.org/wiki/Central_processing_unit

youre welcome

[Andrew Storlie]

If your REALLY looking to learn in depth about cpus and how they work, the engineering behind them... my best answer..... COLLEGE

[Glenwing]

So, how exactly does a CPU work?

I know it has the control unit and the ALU.

I also know it uses different types of registers like how the storage register is used to store the result of an arithmetic operation or a logical calculation (correct me if I'm wrong) and a general register that does whatever the control unit tells it to as well but there's obviously a lot more I don't know. 

 

What is a Floating point unit? What exactly is it? I know that AMD's Bulldozer shared one FPU between two cores which proved to be a pretty big bottle neck. Why? 

 

If the core "modules" posed such an issue to AMD for performance, why couldn't they use a software implementation to "merge" two physical cores into one like how Intel is doing with reverse hyperthreading? 

 

Does every core get a control unit? Or is it more like there's one control unit for one CPU and then each core has its own ALU? If each core gets a control unit, wouldn't that introduce overhead? 

 

What exactly is an instruction set? I see talks of Intel implementing new instruction sets into their CPUs. How does that impact performance? Does it mean that new instruction sets means that the CPUs process the raw data they've been given in a better and more efficient manner?

 

 

Sorry for all these questions ( I have more, lol) but YouTube was no help and I think I want to be a CPU architect one day:D

 

Just for the record, reverse hyperthreading doesn't exist, it was complete speculation based on one outlier test result, and the claim has already been retracted by the website that started the rumor.

[GM_Peka]

You probably wont find people on this forum that can really answer the questions you're asking.

[juretrn]

You probably wont find people on this forum that can really answer the questions you're asking.

Except that some of us just HAPPEN to be electronics engineers.

[TechGod]

Except that some of us just HAPPEN to be electronics engineers.

Exact reason I came here to ask. I've seen a few people here stating they're engineers. 

[TechGod]

Just for the record, reverse hyperthreading doesn't exist, it was complete speculation based on one outlier test result, and the claim has already been retracted by the website that started the rumor.

Thanks. Didn't know that. 

[TechGod]

If your REALLY looking to learn in depth about cpus and how they work, the engineering behind them... my best answer..... COLLEGE

University starts for me the beginning of next year. I'll be going into Comsci first and seeing if I like that.

[Nena Trinity]

Its magical and forged by unicorns? :3

[TechGod]

Its magical and forged by unicorns? :3

Helps so much -.-

[dragoon20005]

Most of the time the CPU uses a combination of instruction sets

 

the most basic part of the CPU which is the ALU uses RISC

 

the outer part of the CPU which is the control unit uses both RISC and CISC

 

all the instructions will have the 3 basic steps

 

first off will be fetch data

 

then decode data

 

once the CPU decoded the instructions it will execute

 

the last or optional step will be to store data (correct me on this)

[TechGod]

Most of the time the CPU uses a combination of instruction sets

 

the most basic part of the CPU which is the ALU uses RISC

 

the outer part of the CPU which is the control unit uses both RISC and CISC

 

all the instructions will have the 3 basic steps

 

first off will be fetch data

 

then decode data

 

once the CPU decoded the instructions it will execute

 

the last or optional step will be to store data (correct me on this)

I just did some reading up on this and I think I understand why the FPU shared between two cores was a bottleneck.

So as you said, the ALU is the most basic component of a CPU and an FPU also utilises an ALU, right? 

You were talking about how the processor works by fetch- decode - execute. So if there's only one FPU performing the binary calculations, both the cores will have to send a "request" to the FPU as it can't keep up, right? So one core sends a request, the FPU fetches the instruction, decodes it and then executes THEN handles the request of the second core. Am I understanding you here?

 

Having an FPU for each core would mean that there would be no wait time required because there just isn't another core waiting to execute its task. Is this correct?

[dragoon20005]

I just did some reading up on this and I think I understand why the FPU shared between two cores was a bottleneck.

So as you said, the ALU is the most basic component of a CPU and an FPU also utilises an ALU, right? 

You were talking about how the processor works by fetch- decode - execute. So if there's only one FPU performing the binary calculations, both the cores will have to send a "request" to the FPU as it can't keep up, right? So one core sends a request, the FPU fetches the instruction, decodes it and then executes THEN handles the request of the second core. Am I understanding you here?

 

Having an FPU for each core would mean that there would be no wait time required because there just isn't another core waiting to execute its task. Is this correct?

this is where my knowledge of CPUs work thou

 

AMD modules system is a different story

 

my knowledge was valid only with single core

[TechGod]

this is where my knowledge of CPUs work thou

 

AMD modules system is a different story

 

my knowledge was valid only with single core

Thank you. You were still helpful.