i3-13100 running at 4.3 Ghz rather than advertised boost freq of 4.5

yazzmatazz · July 4, 2023

Hello. Just built a system on a tight budget. Picked up an i3 13100, ASRock B760M PRO RS/D4, TeamGroup T-FORCE DELTA RGB 32GB (2x16GB) DDR4 3600MHz, 750W PSU. (In case you are thinking the PSU is overkill, I already had a used 6800 xt and might want to reuse the PSU and GPU in the future for a higher-end build).

XMP is enabled, BIOS updated to the latest version (3.11)

The advertised boost freq of the 13100 is 4.5 Ghz and max turbo power is 89W. When I run prime95 the freq of the 4 cores never exceeds 4.3 Ghz. Temperatures are fine during load (70-80 C), and hwinfo does not indicate any of the cores are being thermally throttled. CPU package power consumption barely goes above the base processor power of 60 W even though hwinfo shows that the PL2 (max turbo power) is 110 W. I tried increasing PL1 to 70W but that didn't make a difference.

My (poorly educated) guess is the voltage is being limited by some setting in the system

Any thoughts on what else to look for? I know 0.2 GHz is not a big deal but I'd happily take extra performance if it's on the table. Also would appreciate learning more. I've copied all the CPU info from hwinfo below.

Thanks!

PS I've realized since even the tiniest bit of performance loss bothers me, I might as well return the 13100 and get a 13400 or 13500...

Processor Name: Intel Core i3-13100
Original Processor Frequency: 3400.0 MHz

CPU ID: 000B06F5
CPU Brand Name: 13th Gen Intel(R) Core(TM) i3-13100
CPU Vendor: GenuineIntel
CPU Stepping: H0
CPU Code Name: Raptor Lake-S 4+0
CPU Technology: Intel 7
CPU S-Spec: SRMBU
CPU Thermal Design Power (TDP): 60.0 W
CPU VR Thermal Design Current (TDC): 145.0 A
CPU Power Limits (Max): Power = Unlimited, Time = Unlimited
CPU Power Limit 1 (Long Duration)/Processor Base Power (PBP): Power = 60.00 W, Time = 28.00 sec [Unlocked]
CPU Power Limit 2 (Short Duration)/Maximum Turbo Power (MTP): Power = 110.00 W, Time = 2.44 ms [Unlocked]
CPU Max. Junction Temperature (Tj,max): 100 °C
CPU Type: Production Unit
CPU Platform: BGA1792
Microcode Update Revision: 2C

Number of CPU Cores: 4
Number of Logical CPUs: 8

Operating Points
CPU LFM (Minimum): 800.0 MHz = 8 x 100.0 MHz
CPU HFM (Base): 3400.0 MHz = 34 x 100.0 MHz
CPU Turbo Max: 4500.0 MHz = 45 x 100.0 MHz [Unlocked]
Turbo Ratio Limits - IA/SSE: 45x (1-2c), 43x (3-4c)
Turbo Ratio Limits - AVX2, Resolved: 45x (1-2c), 43x (3-4c)
Maximum Per-core Ratio Limits (Fused): 45, 45, 45, 45
Maximum Per-core Ratio Limits (Current): 45, 45, 45, 45
CPU Current: 4289.5 MHz = 43 x 99.8 MHz @ 1.1381 V
LLC/Ring Maximum: 4100.0 MHz = 41.00 x 100.0 MHz
LLC/Ring Current: 3890.5 MHz = 39.00 x 99.8 MHz

CPU Bus Type: Intel Direct Media Interface (DMI) v2.0

IA Overclocking
Voltage Offset: Not Supported
Voltage Override: Not Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: 45x
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
IccMax: 126.00 A
GT Overclocking
Voltage Offset: Not Supported
Voltage Override: Not Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: 30x
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
IccMax: 30.00 A
CLR (CBo/LLC/Ring) Overclocking
Voltage Offset: Not Supported
Voltage Override: Not Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: 41x
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
GT Media Overclocking
Voltage Offset: Not Supported
Voltage Override: Not Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: 26x
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
SA Overclocking
Voltage Offset: Not Supported
Voltage Override: Not Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: N/A
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
L2 E-core Overclocking
Voltage Offset: Not Supported
Voltage Override: Not Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: N/A
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV

IA Domain Loadline (AC/DC): 1.300 / 1.300 mOhm
GT Domain Loadline (AC/DC): 4.000 / 4.000 mOhm

Cache and TLB
L1 Cache: Instruction: 4 x 32 KBytes, Data: 4 x 48 KBytes
L2 Cache: Integrated: 4 x 1280 KBytes
L3 Cache: 12 MBytes

Standard Feature Flags
FPU on Chip Present
Enhanced Virtual-86 Mode Present
I/O Breakpoints Present
Page Size Extensions Present
Time Stamp Counter Present
Pentium-style Model Specific Registers Present
Physical Address Extension Present
Machine Check Exception Present
CMPXCHG8B Instruction Present
APIC On Chip / PGE (AMD) Present
Fast System Call Present
Memory Type Range Registers Present
Page Global Feature Present
Machine Check Architecture Present
CMOV Instruction Present
Page Attribute Table Present
36-bit Page Size Extensions Present
Processor Number Not Present
CLFLUSH Instruction Present
Debug Trace and EMON Store Present
Internal ACPI Support Present
MMX Technology Present
Fast FP Save/Restore (IA MMX-2) Present
Streaming SIMD Extensions Present
Streaming SIMD Extensions 2 Present
Self-Snoop Present
Multi-Threading Capable Present
Automatic Clock Control Present
IA-64 Processor Not Present
Signal Break on FERR Present
Virtual Machine Extensions (VMX) Not Present
Safer Mode Extensions (Intel TXT) Not Present
Streaming SIMD Extensions 3 Present
Supplemental Streaming SIMD Extensions 3 Present
Streaming SIMD Extensions 4.1 Present
Streaming SIMD Extensions 4.2 Present
AVX Support Present
Fused Multiply Add (FMA) Present
Carryless Multiplication (PCLMULQDQ)/GFMUL Present
CMPXCHG16B Support Present
MOVBE Instruction Present
POPCNT Instruction Present
XSAVE/XRSTOR/XSETBV/XGETBV Instructions Present
XGETBV/XSETBV OS Enabled Present
Float16 Instructions Present
AES Cryptography Support Present
Random Number Read Instruction (RDRAND) Present
Extended xAPIC Present
MONITOR/MWAIT Support Present
Thermal Monitor 2 Present
Enhanced SpeedStep Technology Present
L1 Context ID Not Present
Send Task Priority Messages Disabling Present
Processor Context ID Present
Direct Cache Access Not Present
TSC-deadline Timer Present
Performance/Debug Capability MSR Present
IA32 Debug Interface Support Not Present
64-Bit Debug Store Present
CPL Qualified Debug Store Not Present
Extended Feature Flags
64-bit Extensions Present
RDTSCP and TSC_AUX Support Present
1 GB large page support Present
No Execute Present
SYSCALL/SYSRET Support Present
Bit Manipulation Instructions Set 1 Present
Bit Manipulation Instructions Set 2 Present
Advanced Vector Extensions 2 (AVX2) Present
Advanced Vector Extensions 512 (AVX-512) Foundation Not Present
AVX-512 Prefetch Instructions Not Present
AVX-512 Exponential and Reciprocal Instructions Not Present
AVX-512 Conflict Detection Instructions Not Present
AVX-512 Doubleword and Quadword Instructions Not Present
AVX-512 Byte and Word Instructions Not Present
AVX-512 Vector Length Extensions Not Present
AVX-512 52-bit Integer FMA Instructions Not Present
Secure Hash Algorithm (SHA) Extensions Present
Software Guard Extensions (SGX) Support Not Present
Supervisor Mode Execution Protection (SMEP) Present
Supervisor Mode Access Prevention (SMAP) Present
Hardware Lock Elision (HLE) Not Present
Restricted Transactional Memory (RTM) Not Present
Memory Protection Extensions (MPX) Not Present
Read/Write FS/GS Base Instructions Present
Enhanced Performance String Instruction Present
INVPCID Instruction Present
RDSEED Instruction Present
Multi-precision Add Carry Instructions (ADX) Present
PCOMMIT Instructions Not Present
CLFLUSHOPT Instructions Present
CLWB Instructions Present
TSC_THREAD_OFFSET Not Present
Platform Quality of Service Monitoring (PQM) Not Present
Platform Quality of Service Enforcement (PQE) Not Present
FPU Data Pointer updated only on x87 Exceptions Not Present
Deprecated FPU CS and FPU DS Present
Intel Processor Trace Present
PREFETCHWT1 Instruction Not Present
AVX-512 Vector Bit Manipulation Instructions Not Present
AVX-512 Vector Bit Manipulation Instructions 2 Not Present
AVX-512 Galois Fields New Instructions Present
AVX-512 Vector AES Present
AVX-512 Vector Neural Network Instructions Not Present
AVX-512 Bit Algorithms Not Present
AVX-512 Carry-Less Multiplication Quadword (VPCLMULQDQ) Present
AVX-512 Vector POPCNT (VPOPCNTD/VPOPCNTQ) Not Present
User-Mode Instruction Prevention Present
Protection Keys for User-mode Pages Not Present
OS Enabled Protection Keys Not Present
Wait and Pause Enhancements (WAITPKG) Present
Total Memory Encryption Not Present
Key Locker Not Present
57-bit Linear Addresses, 5-level Paging Not Present
Read Processor ID Present
OS Bus-Lock Detection Not Present
Cache Line Demote Not Present
MOVDIRI: Direct Stores Present
MOVDIR64B: Direct Stores Present
ENQCMD: Enqueue Stores Not Present
SGX Launch Configuration Not Present
Protection Keys for Supervisor-Mode Pages Not Present
Control-Flow Enforcement Technology (CET) Shadow Stack Present
Attestation Services for Intel SGX Not Present
AVX-512 4 x Vector Neural Network Instructions Word Variable Precision Not Present
AVX-512 4 x Fused Multiply Accumulation Packed Single Precision Not Present
Fast Short REP MOV Present
User Interrupts Not Present
AVX-512 VP2INTERSECT Support Not Present
AVX-512 FP16 Not Present
MD_CLEAR Support Present
IA32_MCU_OPT_CTRL MSR Support Not Present
Restricted Transactional Memory (RTM) Always Abort Not Present
Restricted Transactional Memory (RTM) Force Abort Not Present
SERIALIZE Present
Hybrid Processor Not Present
TSX Suspend Load Address Tracking Not Present
Platform Configuration (PCONFIG) Not Present
Architectural LBRs Present
Indirect Branch Restricted Speculation (IBRS), Indirect Branch Predictor Barrier (IBPB)Present
Single Thread Indirect Branch Predictors (STIBP) Present
L1D_FLUSH Support Present
IA32_ARCH_CAPABILITIES MSR Present
IA32_CORE_CAPABILITIES MSR Not Present
Speculative Store Bypass Disable (SSBD) Present
Control-Flow Enforcement Technology (CET) Indirect Branch Tracking Present
Advanced Matrix Extensions (AMX) Tile Architecture Not Present
Advanced Matrix Extensions (AMX) bfloat16 Support Not Present
Advanced Matrix Extensions (AMX) 8-bit Integer Operations Not Present
Advanced Matrix Extensions (AMX) FP16 Instructions Not Present
AVX (VEX-encoded) Vector Neural Network Instructions Present
AVX-512 BFLOAT16 Instructions Not Present
Fast Zero-Length MOVSB Present
Fast Short STOSB Present
Fast Short CMPSB, SCASB Present
History Reset Present
Linear Address Masking Not Present
RAO-INT Instructions Not Present
CMPccXADD Instructions Not Present
WRMSRNS Instruction Not Present
AVX-IFMA Instructions Not Present
RD/WR MSRLIST Instructions Not Present
Protected Processor Inventory Number (IA32_PPIN) Support Not Present
AVX-VNNI-INT8 Instructions Not Present
AVX-NE-CONVERT Instructions Not Present
PREFETCHIT0/1 Instructions Not Present
AMX-COMPLEX Instructions Not Present
CET Supervisor Shadow-Stack Not Present
Not Exhibiting MXCSR Configuration Dependent Timing (MCDT) Not Present
UC-Lock Disable Feature Not Present

Vulnerability Mitigation Mechanisms
Rogue Data Cache Load (RDCL): Not Susceptible
Speculative Store Bypass (SSB): Susceptible
Microarchitectural Data Sampling (MDS): Not Susceptible
MCE on modifying code page size without TLB invalidation: Not Susceptible
Transactional Asynchronous Abort (TAA): Not Affected
Shared Buffers Data Read (SBDR), Sideband Stale Data Propagator (SSDP) Vulnerability:Not Affected
Fill Buffer Stale Data Propagator (FBSDP) Vulnerability: Not Affected
Primary Stale Data Propagator (PSDP) Vulnerability: Not Affected
Post-barrier Return Stack Buffer Predictions Vulnerability: Affected
Indirect Branch Restriction Speculation (IBRS): Supported
RTM_DISABLE and TSX_CPUID_CLEAR: Not Supported
RSB Alternate: Supported
L1D Flush on VM Entry Not Needed: Supported
Data Operand Independent Timing Mode (DOITM): Not Supported
Energy Filtering Control: Not Supported
Data Operand Independent Timing Mode: Not Supported
RRSBA Alternate Prediction Behavior: Not Supported
BHI_NO Branch Prediction Behavior: Not Supported
MCU Extended Servicing: Not Supported
Overclocking Utilized: Disabled
Dynamic Overclocking Undervolt Protection: Enabled
Overclocking Secure Status: Enabled

Enhanced Features
Thermal Monitor 1: Supported, Enabled
Thermal Monitor 2: Supported, Enabled
Enhanced Intel SpeedStep (GV3): Supported, Enabled
Bi-directional PROCHOT#: Enabled
Extended Auto-HALT State C1E: N/A
MLC Streamer Prefetcher Supported, Enabled
MLC Spatial Prefetcher Supported, Enabled
DCU Streamer Prefetcher Supported, Enabled
DCU IP Prefetcher Supported, Enabled
Intel Dynamic Acceleration (IDA) Technology: Not Supported
Intel Dynamic FSB Switching: Not Supported
Intel Turbo Boost Technology: Supported, Enabled
Programmable Ratio Limits: Supported, Disabled
Programmable TDC/TDP Limits: Supported, Disabled
Hardware Duty Cycling: Not Supported
Intel Speed Select: Not Supported

CPU SKU Features
NVME: Supported
DMI x4 Width: Supported
DRAM ECC: Not Supported
VT-d: Supported
DMI in Gen2 Mode: Supported
1N Mode DDR Timings: Supported
Camarillo (DTT) Device: Supported
2 DIMMs per Channel: Supported
X2APIC: Supported
Dual Memory Channel: Supported
Integrated GPU (IGD): Enabled
2 Level Memory (2LM): Not Supported
DDR Overclocking: Enabled
Maximum Memory Size per Channel: 32 GB (unlimited)
IMGU/IPU Device: Not Supported
Intel Processor Trace (Northpeak): Supported
Overclocking: Disabled
Hyper-Threading (SMT): Supported
SVM: Supported
Additive Graphics: Disabled
PCIe Gen 3: Supported
DMI Gen 3: Supported
HDCP: Supported
L Technology: 1LM
VMD: Supported
PCIe Gen 5: Supported
PCIe Gen 4: Supported
BCLK OC Limit: 100 MHz
DDR4: Supported
LPDDR4: Not Supported
Dynamic Memory Frequency (QCLK GV): Supported
Software Guard Extension (SGX): Not Supported
DDR5: Supported
LPDDR5: Not Supported

Voltage Regulator (SVID)
VCC VR: Richtek (0x9), Unknown (0x11)
VR Thermal Sensor: Not Supported

Memory Ranges
Maximum Physical Address Size: 39-bit (512 GBytes)
Maximum Virtual Address Size: 48-bit (256 TBytes)
MTRRs
Range 80000000-100000000 (2048MB-4096MB) Type: Uncacheable (UC)
Range 70000000-80000000 (1792MB-2048MB) Type: Uncacheable (UC)
Range 6C000000-70000000 (1728MB-1792MB) Type: Uncacheable (UC)
Range 2000000000-4000000000 (131072MB-262144MB) Type: Uncacheable (UC)
Range 1000000000-2000000000 (65536MB-131072MB) Type: Uncacheable (UC)
Range 4000000000-8000000000 (262144MB-524288MB) Type: Uncacheable (UC)

RONOTHAN## · July 4, 2023

What's actually happening is that 4.5GHz advertised boost is the single core advertised boost. The multi core boost that you're looking at in P95 is almost always 100-200 MHz below the single core boost speed. If you run something like single core Cinebench, it should hit 4.5GHz.