AMD Provides Details on Zen 3 & Zen 4 Architectures + Milan/Genoa Roadmap (Updated)

[BiG StroOnZ]

Quote

Spoiler

 

 

Between now and 2021, with the upcoming Epyc Milan and Epyc Genoa, AMD will look to swing the server segment further in its favor with better IPC, reduced latency, and increased performance per watt. At the HPC-AI Advisory Council UK conference, AMD divulged some details regarding its upcoming Zen 3 and Zen 4 architectures, as well as establishing a timeline for the next-gen Epyc Milan and Genoa processors.

 

 As things stand now, AMD could be on track to claw away as much as 10% of the lucrative market throughout 2020 and AMD looks to maintain its forward momentum hot off the heels of its Zen 2 Epyc "Rome" CPUs. AMD set out to update its Zen architecture on a yearly basis, and this latest roadmap reiterates that. Milan is already in tape out, which means the chips are likely being sampled among some of AMD's closest customers. Milan will boast Zen 3 cores on a refreshed 7nm+ node, and should enter volume production in Q3 2020. Milan chips will scale up to 64 cores, the same as current-gen Rome, and drop into the same SP3 socket. Additionally, Milan looks to leverage 2 threads per core, putting to rest the rumor that it could come with as many as 4 threads per core.

 

Milan will also use the same nine-die configuration as Rome, with eight compute dies and one I/O die. However, it appears AMD will make some alterations under the hood, equipping each CCD (core complex die) with up 32MB of unified L3 cache.

 

Sitting out further on the horizon is Genoa, which will presumably use Zen 4 cores. Looking at the roadmap, Genoa will also signal the end for the SP3 socket, introducing the SP5 platform. Genoa would also arrive with support for DDR5 memory, and AMD is no doubt mulling a shift to PCIe 5.0. Genoa chips are currently in the "design" phase, and should land sometime in 2021.

 

Source: https://www.tomshardware.com/news/amd-zen-3-zen-4-epyc-rome-milan-genoa-architecture-microarchitecture,40561.html

Source 2: https://hothardware.com/news/amd-epyc-zen-3-milan-cpus-l3-cache-zen-4-genoa-sp5-socket-ddr5

 

It is said, looking at the diagrams (in spoiler tags) - that there are changes in the L3, as well as the core complexes, to vastly assist in latency reduction. Also, the faster memory and cache will aid greatly too. While during this timeline we would hope Intel still attempts to innovate with more vigor than they have been since Zen launch; it still makes you wonder, with all these changes, if AMD can take the gaming crown or at the very least equalize the playing field completely. One thing is for sure, all of these changes and advances in the industry are great for consumers of all camps (especially those who are brand agnostic).  

 

Zen 3 IPC Gains Are ‘Greater’ Than 8 Percent (And Zen 3 capable of 100-200MHz higher clockspeeds):

 

Quote

However, a very good source of mine emailed me and provided me insight into the IPC gains of Zen 3, telling me that speculation that the chip had an insignificant improvement over Zen 2 isn’t accurate. I asked him via email if it was over 5-8 percent (a figure I’d guessed based on what tweaks we’ve seen so far in the public eye) and was told that the gains is more than this, but he wasn’t able to provide exact numbers right now.

 

He also confirmed information that is currently doing the rounds on ChipHell.com from a forum member ‘Zoo’. Zoo claims that the early Engineering Sample Zen 3 silicon is hitting 100 to 200MHz higher than what Zen 2 was capable of. This is very interesting, as obviously early Engineering Sample silicon isn’t exactly the best performing chips, and thus there’s possibly a hope we can see more than this in final retail chips.

 

 

This source has previously given very accurate information regarding the Zen 2 series of CPUs, and so they’ve a pretty good track record.

 

Being conservative (and this IS NOT what a source told me, I am giving an example), let’s say AMD hit 10 percent IPC gains with 200 – 300 MHz higher on average for zen 3, but still retain the same core counts as now, t would still make for incredibly compelling chips, especially for gamers. It also means that Intel would be under incredible pressure with Comet Lake, as we can presume they can’t get the 10-core parts much higher than 5GHZ.

 

As with all rumors, this information can be wrong, but I don’t think AMD would want to do another Zen+ gain, indeed they’ve publically stated that they didn’t want to do another

 

Source 3: http://www.redgamingtech.com/zen-3-ipc-gains-are-greater-than-8-percent-exclusive/

[justpoet]

What is interesting to me is that it looks like, rather than making L3 cache larger, they're also making L3 cache a single cache across the whole chip for Milan.  If they can pull that off without concurrency issues at that number of cores, it'd likely be huge for large multi-process communication latency speed across CCD/CCX's, removing scheduler and affinity issues and the like that currently make some games (and other apps) run better with SMT/hyperthreading turned off.

[williamcll]

1 minute ago, justpoet said:

What is interesting to me is that it looks like, rather than making L3 cache larger, they're also making L3 cache a single cache across the whole chip for Milan.  If they can pull that off without concurrency issues at that number of cores, it'd likely be huge for large multi-process communication latency speed across CCD/CCX's, removing scheduler and affinity issues and the like that currently make some games (and other apps) run better with SMT/hyperthreading turned off.

It seems like L3 cache seems to swing between separate and singular every few architecture changes.

[justpoet]

1 hour ago, williamcll said:

It seems like L3 cache seems to swing between separate and singular every few architecture changes.

I think that is based on how fast and concurrently they can access whatever they use for the L3 memory architecture of the time.  To not bottleneck individual cores, when it can't keep up, it ends up split.  When it can keep up, it is that much better when it is shared.

[Doobeedoo]

Very nice for cache changes. An 8 core CCX woud be great. So such changes along PCIe 5.0, DDR5, USB4 the future AM5 platform is shaping up nicely. 

[2FA]

10 hours ago, comander said:

I've been kind of face-palming the whole time while people were saying SMT4 would be a thing. (it could, it's just unlikely and doesn't seem like a good fit for Zen)

Zen is aggressively OoOE, the idea of filling the pipeline with more threads is usually NOT the trade-off you'd want to make.
SMT2 likely requires somewhere on the order of a 5% increase in core size. SMT4 likely requires several times more this. 
You end up with a choice between 10-20% bigger cores with modestly better MT performance vs the choice of simply adding 10-20% more cores (or cheaper parts or adding in more functional units or boosting the backend on Zen or...)

 

 

I read the original article about the whole SMT4 thing and it was very clear based off the wording that it was just the author's own speculation at what AMD could possibly do to jump ahead of Intel even more. It didn't mention anything about possible rumors or leaks, just that it was something that AMD could and/or should do. Anyone who interpreted that differently needs to improve their reading comprehension or stop willfully adding nonexistent details.

[BiG StroOnZ]

Here's a very cool update to this story!

 

Zen 3 IPC Gains Are ‘Greater’ Than 8 Percent (also Zen 3 capable of 100-200MHz higher clocks compared to Zen 2):

 

Quote

However, a very good source of mine emailed me and provided me insight into the IPC gains of Zen 3, telling me that speculation that the chip had an insignificant improvement over Zen 2 isn’t accurate. I asked him via email if it was over 5-8 percent (a figure I’d guessed based on what tweaks we’ve seen so far in the public eye) and was told that the gains is more than this, but he wasn’t able to provide exact numbers right now.

 

He also confirmed information that is currently doing the rounds on ChipHell.com from a forum member ‘Zoo’. Zoo claims that the early Engineering Sample Zen 3 silicon is hitting 100 to 200MHz higher than what Zen 2 was capable of. This is very interesting, as obviously early Engineering Sample silicon isn’t exactly the best performing chips, and thus there’s possibly a hope we can see more than this in final retail chips.

 

 

This source has previously given very accurate information regarding the Zen 2 series of CPUs, and so they’ve a pretty good track record.

 

Being conservative (and this IS NOT what a source told me, I am giving an example), let’s say AMD hit 10 percent IPC gains with 200 – 300 MHz higher on average for zen 3, but still retain the same core counts as now, t would still make for incredibly compelling chips, especially for gamers. It also means that Intel would be under incredible pressure with Comet Lake, as we can presume they can’t get the 10-core parts much higher than 5GHZ. 

 

Source 3: http://www.redgamingtech.com/zen-3-ipc-gains-are-greater-than-8-percent-exclusive/