Confusion when looking at IC datasheet

[Coaxialgamer]

I've been looking at the datasheet for the SN74F283 . It's a 4 bit binary full adder and uses a carry look-ahead adder. 

 

http://www.ti.com/lit/ds/symlink/sn74f283.pdf

 

As i understand it , a CLA adder reduces propagation delay time by looking at the higher inputs of the two numbers .

however , i looked at the datasheet again recently and found that the document states:

Quote

The device features full internal look-ahead across all four bits generating the carry term C4 in typically 5.7 ns

 

What exactly does that mean ? If i plug 2 4 bit numbers into this IC , will the output arrive after 5.7ns ( 1.4ns per bit ) or 22.8ns ( 5.7ns per bit )?

[Unimportant]

On 11/4/2017 at 12:24 AM, Coaxialgamer said:

What exactly does that mean ? If i plug 2 4 bit numbers into this IC , will the output arrive after 5.7ns ( 1.4ns per bit ) or 22.8ns ( 5.7ns per bit )?

Each gate has what is called a propagation delay, which is the time it takes for a certain input to reach a valid output. For a complex IC like the 74F283, which internally consists of lots of gates, the time depends on the "path" taken. That means there is a difference between different input to output paths of the chip. The datasheet you linked specifies this on page 2-4: "Switching characteristics".

 

For example, the typical propagation delay for the carry input (C0) to reach a sum output (Σ) is 6.6nS. From carry input (C0) to carry output (C4) is 5.3 / 5 nS (rise / fall) and so on.

 

So:

Quote

If i plug 2 4 bit numbers into this IC , will the output arrive after 5.7ns ( 1.4ns per bit ) or 22.8ns ( 5.7ns per bit )?

• Typical time for the sum outputs is 6.6 nS
• Typical time for the carry output is 5.3 / 5 nS (rise / fall).

This is for a single chip, if you cascade multiple chips to create a 8-bit (or more) adder then you have to keep in mind the carry bit has to ripple trough the chips.

 

Note that the test conditions also play a role. The datasheet numbers were taken with a 500 ohm/ 50 pF load at 25 degrees Celsius. Different loads and temperatures will affect these times. Also note that you should actually be using worst-case numbers if your design is timing critical. That means using MAX values under the worst possible operating conditions for your design.