AMD Needs to hurry

[Opcode]

And you're the only one I know who thinks Intel can't copy that move or meet it ahead of time. but for 512 SPs, a 128MB buffer with Intel's caching algorithm will keep it very well fed. Samsung has now produced 4000MHz SODIMMs for DDR4 that, when running in dual channel mode, has bandwidth equivalent to GDDR5 with a 256-bit bus at 800MHz.

 

The tech will keep up as it always does. 

 

There are 3 companies you don't bet against in the modern world: Apple, IBM, and Intel. Why you're ready to jump before seeing the products is beyond my ability to comprehend.

You have to remember 512 SP's was yesterdays technology as Kaveri is already a year old. As said a 128 MB cache isn't exactly optimal especially when it comes to gaming. Almost every modern title on the market will overflow that cache in a heartbeat. Good luck trying to install SODIMMS into a desktop. Let alone neither companies will be leveraging DDR4 for a long while (even Skylake won't be using DDR4). So that statement is pretty much moot. AMD isn't someone to bet against as well especially in something they are known best in the market at for the past several years. Jump before seeing products? Intel's already laid out their game plans for the next several years which is nothing impressive. AMD doors are closed tight and we won't know whats up until January.

[patrickjp93]

You have to remember 512 SP's was yesterdays technology as Kaveri is already a year old. As said a 128 MB cache isn't exactly optimal especially when it comes to gaming. Almost every modern title on the market will overflow that cache in a heartbeat. Good luck trying to install SODIMMS into a desktop. Let alone neither companies will be leveraging DDR4 for a long while (even Skylake won't be using DDR4). So that statement is pretty much moot. AMD isn't someone to bet against as well especially in something they are known best in the market at for the past several years. Jump before seeing products? Intel's already laid out their game plans for the next several years which is nothing impressive. AMD doors are closed tight and we won't know whats up until January.

You do know that for a single map or area the whole thing actually tends to fit in a 32 MB package, right? Intel, Microsoft, and many others came to this same conclusion. Hence the caching algorithm looking ahead to see what will be necessary given the possibilities of a few branches of events. Skylake will use both DDR3 and DDR4. that's already confirmed.

 

Nothing impressive? Skylake has 492GFlops on its own without the iGPU due to the new 512-bit instructions. Not to mention it might even support hex-channel or octal-channel memory. Every time Intel has been underestimated, the ones guilty of doing so have been crushed. So it was when IBM, Broadcomm, and others were kicked clean out of the server world. So it is now happening that tablets are leaving ARM for x86. Phones are the last major market people think Intel can't break into.

 

If you think Intel can't solidly hold on to its existing markets, you don't know Intel and all the innovations it has stored up.

[Opcode]

You do know that for a single map or area the whole thing actually tends to fit in a 32 MB package, right? Intel, Microsoft, and many others came to this same conclusion. Hence the caching algorithm looking ahead to see what will be necessary given the possibilities of a few branches of events. Skylake will use both DDR3 and DDR4. that's already confirmed.

 

Nothing impressive? Skylake has 492GFlops on its own without the iGPU due to the new 512-bit instructions. Not to mention it might even support hex-channel or octal-channel memory. Every time Intel has been underestimated, the ones guilty of doing so have been crushed. So it was when IBM, Broadcomm, and others were kicked clean out of the server world. So it is now happening that tablets are leaving ARM for x86. Phones are the last major market people think Intel can't break into.

 

If you think Intel can't solidly hold on to its existing markets, you don't know Intel and all the innovations it has stored up.

I'm not denying that eDRAM doesn't help but it's definitely not the ultimate solution while moving forward. DDR4 prices are still quite high and hopefully they stabilize before 2016. DDR4-3000 in quad channel tops out at 60 GB/s on the 2011-v3 platform. So it needs to come down in pricing drastically over the next year before Zen makes it's debut. It will be perfect for feeding iGPU's around 10 compute units. Beyond that we will need drastically faster DDR4 up into the 4000 MHz range. Which said again we need to see some major price fluctuations in the market. Hopefully with 2011-v3 platform available that manufactures will slowly transition their resources into producing more DDR4.

 

Nothing impressive for consumers. AVX-512 is a Skylake Xeon and Xeon Phi exclusive instruction. Consumer Skylake will not have this instruction. Meanwhile Carrizo already has implemented AVX. So really no competition there. I also would like to see where you're getting numbers from as that's not practical even out of an enthusiast grade chip (i7-5960X). Skylake is still only 8 flops per cycle. You do the math once we find out what the clock frequencies of the consumer chips are.

 

You really need to cut back on the fanboyism as it's only making you look like a fool here (most of us frown upon fanboys). As you guys are the ones who typically make up fictional information and numbers in order to back your favorite company. Not to be "mean" but this is why a lot of people don't like you here and why most people don't even acknowledge what you have to say. Personally I have been watching you copy and paste from OCN and other sites consistently. If you want to be credible add your own input and at least ensure that it is partially right. I'll openly admit I'm not always right about everything but every post I make has at least some facts in it. Your post above, not a single part of it is backed by either credible evidence or common sense. 500 GFLOPS out of a quad core I almost fell out of my chair laughing so hard.

[patrickjp93]

I'm not denying that eDRAM doesn't help but it's definitely not the ultimate solution while moving forward. DDR4 prices are still quite high and hopefully they stabilize before 2016. DDR4-3000 in quad channel tops out at 60 GB/s on the 2011-v3 platform. So it needs to come down in pricing drastically over the next year before Zen makes it's debut. It will be perfect for feeding iGPU's around 10 compute units. Beyond that we will need drastically faster DDR4 up into the 4000 MHz range. Which said again we need to see some major price fluctuations in the market. Hopefully with 2011-v3 platform available that manufactures will slowly transition their resources into producing more DDR4.

 

Nothing impressive for consumers. AVX-512 is a Skylake Xeon and Xeon Phi exclusive instruction. Consumer Skylake will not have this instruction. Meanwhile Carrizo already has implemented AVX. So really no competition there. I also would like to see where you're getting numbers from as that's not practical even out of an enthusiast grade chip (i7-5960X). Skylake is still only 8 flops per cycle. You do the math once we find out what the clock frequencies of the consumer chips are.

 

You really need to cut back on the fanboyism as it's only making you look like a fool here (most of us frown upon fanboys). As you guys are the ones who typically make up fictional information and numbers in order to back your favorite company. Not to be "mean" but this is why a lot of people don't like you here and why most people don't even acknowledge what you have to say. Personally I have been watching you copy and paste from OCN and other sites consistently. If you want to be credible add your own input and at least ensure that it is partially right. I'll openly admit I'm not always right about everything but every post I make has at least some facts in it. Your post above, not a single part of it is backed by either credible evidence or common sense. 500 GFLOPS out of a quad core I almost fell out of my chair laughing so hard.

multiply that number by 2 signore. The bus isn't 2-sided 32 anymore. it's 2-sided 64, and that's the rated bandwidth for dual channel.

 

also, no, AVX 512 is coming to Skylake S. This was confirmed by Kirzanich at the IDF conference.

 

It's not fanboyism. It's the rated FPU performance scaling from SiSoft based on the first Skylake benchmarks. Ramp it up to 4.4 GHz and that's what you'll get.

 

I never copy and paste from OCN. Do attempt to prove otherwise. And you call me a fanboy?! I admit when AMD does something good. You're the one here who thinks AMD's Zen will be the greatest chip innovation since Athlon 64!

 

16 floats x 32 bits = 512 bits. 16x4 = 64 per core due to having 4 full ALUs. 64x4 = 256 floating point numbers opped across 4 cores in fully loaded AVX 512. multiply that by 4 GHz and put that in your pipe and smoke it. Of course, then also account for instructions taking multiple cycles and well... Then it comes down to pipelining. Adds are still 1 cycle, and mul/div are 3 or less because of the process shrink shaving down from 5 in Haswell to 3 in Broadwell.

 

Knight's Landing CPUs coming in at 6 TFlops single precision, the accelerators coming in at 14 and you think Intel can't push the envelope in lower environments?

[Opcode]

multiply that number by 2 signore. The bus isn't 2-sided 32 anymore. it's 2-sided 64, and that's the rated bandwidth for dual channel.

 

also, no, AVX 512 is coming to Skylake S. This was confirmed by Kirzanich at the IDF conference.

 

It's not fanboyism. It's the rated FPU performance scaling from SiSoft based on the first Skylake benchmarks. Ramp it up to 4.4 GHz and that's what you'll get.

 

I never copy and paste from OCN. Do attempt to prove otherwise. And you call me a fanboy?! I admit when AMD does something good. You're the one here who thinks AMD's Zen will be the greatest chip innovation since Athlon 64!

DDR4 uses a channel per dimm topology. Otherwise not a whole lot has changed. DDR4-3000 (4x4 GB) tops out at 60 GB/s in both integer and float with a i7-5960X.

 

Intel's official documentation for AVX-512 states otherwise.

 

SiSoft is a poor source for anything other than speculating hardware specifications. In short it's the "WCCFtech" of benchmarking. Skylake is still only 8 flops per cycle just as Bdver1/2/3 is 16 flops per module. I have doubts of Skylake having high base clocks especially on a smaller node. So far all we can assume is that Skylake base clock is 2.3 GHz from SiSoft validations (other sources are saying 2.3 GHz base & 2.9 GHz turbo as well). Which puts the chip at 147.2 GFLOPs peak performance.

 

I don't know if Zen will be a huge innovation like its little brother the Athlon 64. Jim Keller is on the job and until we see what turns about we can't make any assumptions. Tho we can pretty much guarantee that it will triumph all current FX based microprocessors. That's a known fact as we all know what Jim Keller is capable of.

 

Actually quite a bit, your post here was a direct copy and paste from OCN's thread regarding the same subject.

 

You are probably one of the most un-credible people on this forum. I think I'm the only one who even bothers to debunk your posts anymore.

[patrickjp93]

DDR4 uses a channel per dimm topology. Otherwise not a whole lot has changed. DDR4-3000 (4x4 GB) tops out at 60 GB/s in both integer and float with a i7-5960X.

 

Intel's official documentation for AVX-512 states otherwise.

 

SiSoft is a poor source for anything other than speculating hardware specifications. In short it's the "WCCFtech" of benchmarking. Skylake is still only 8 flops per cycle just as Bdver1/2/3 is 16 flops per module. I have doubts of Skylake having high base clocks especially on a smaller node. So far all we can assume is that Skylake base clock is 2.3 GHz from SiSoft validations (other sources are saying 2.3 GHz base & 2.9 GHz turbo as well). Which puts the chip at 147.2 GFLOPs peak performance.

 

I don't know if Zen will be a huge innovation like its little brother the Athlon 64. Jim Keller is on the job and until we see what turns about we can't make any assumptions. Tho we can pretty much guarantee that it will triumph all current FX based microprocessors. That's a known fact as we all know what Jim Keller is capable of.

 

Actually quite a bit, your post here was a direct copy and paste from OCN's thread regarding the same subject.

 

You are probably one of the most un-credible people on this forum. I think I'm the only one who even bothers to debunk your posts anymore.

That's a total coincidence, and kinda freaky... Everyone seemed so disappointed at Skylake so I thought I should see what scaling looked like. I didn't plagiarize at all, but damn that's weird...

 

either way, Opcode you really need to back off the AMD fanboyism. 

 

Also, no way in Hell does Skylake top off at 149 with AVX 2. That's still 128x 4.4 GHz and then dealing with the clock cycle counts and such which aren't yet known, and the pipelining. this is also an S chip with no hyperthreading yet on SiSoft's known to be immature benches.

[Priller]

I wonder if they could use stacked DRAM for the on board GPU and still have the CPU portion use DD3/4.

[patrickjp93]

I wonder if they could use stacked DRAM for the on board GPU and still have the CPU portion use DD3/4.

I believe the idea was to use the HBM as a LLC, but don't quote me on that. The word seems to be Carrizo won't be coming with it to desktop and mobile, but I don't know if that will pertain to servers as well or not.

[Opcode]

either way, Opcode you really need to back off the AMD fanboyism. 

 

Also, no way in Hell does Skylake top off at 149 with AVX 2. That's still 128x 4.4 GHz and then dealing with the clock cycle counts and such which aren't yet known, and the pipelining. this is also an S chip with no hyperthreading yet on SiSoft's known to be immature benches.

I'm not a fanboy at all. I only stick up to those who make assumptions of one company being better than all the rest (e.g. fanboyism).

 

Skylake comes in clocked at 2.3 GHz base with 2.9 GHz turbo. Do the math and you get 147.2 GFLOPs peak performance with AVX2.

 

The sad thing is Carrizo is 2.9 GHz with 3.4 GHz turbo. Which is 185.6 GFLOPs peak performance on a 15-35w TDP. That's actually damn impressive.

 

Them numbers are based on hardware specifications of SiSoft validations (speculation).

 

I wonder if they could use stacked DRAM for the on board GPU and still have the CPU portion use DD3/4.

With Globalfoundries 28nm node 2.5D die stacking is possible. The plan could be as simple as stacking HBM directly on top of the compute units.

[Razzaa]

AMD has been coming out with a new chip to compete with Intel for years now.............I swear this conversation happens every 6 months but still nothing from AMD.

[mr moose]

Knowing AMD their next big release will be 6-12 months after they post a countdown timer giving Richard Huddy enough time to run around making shit up about the competition.

 

Relax fanboys, it's just tongue in cheek humour!

[Majestic]

I don't see AMD coming with a chip that suddenly is 300% better than they currently put out. Not unless they cheated somehow.

Currently, the 4770K is 252% more efficient than the 8350 (performance/watt). 

 

I'm sorry, I just don't see it become the objective choice. People are mostly going to buy Zen CPU's out of fanboyism and being misinformed I fear. Much like they're still buying FX CPU's right now, since there is no reason you should.

[Priller]

I'm not a fanboy at all. I only stick up to those who make assumptions of one company being better than all the rest (e.g. fanboyism).

 

Skylake comes in clocked at 2.3 GHz base with 2.9 GHz turbo. Do the math and you get 147.2 GFLOPs peak performance with AVX2.

 

The sad thing is Carrizo is 2.9 GHz with 3.4 GHz turbo. Which is 185.6 GFLOPs peak performance on a 15-35w TDP. That's actually damn impressive.

 

Them numbers are based on hardware specifications of SiSoft validations (speculation).

 

With Globalfoundries 28nm node 2.5D die stacking is possible. The plan could be as simple as stacking HBM directly on top of the compute units.

 

Would that fit inside the IHS or require it to be stacked sideways would be my question.

 

I don't see AMD coming with a chip that suddenly is 300% better than they currently put out. Not unless they cheated somehow.

Currently, the 4770K is 252% more efficient than the 8350 (performance/watt). 

 

I'm sorry, I just don't see it become the objective choice. People are mostly going to buy Zen CPU's out of fanboyism and being misinformed I fear. Much like they're still buying FX CPU's right now, since there is no reason you should.

 

If we were to look at the Phenom II for example. Had they die shrunk it, made it an 8 core it would in theory spit out scores that would actually rival the current Haswell CPUs. 

 

I had someone run tests on his Phenom at various frequencies to look at scaling and even if you were to go with the low side it would be better then FXs. Not to mention Phenom IIs have a 1+Ghz advantage in IPC on FXs.

 

EDIT: 

 

Here is the post. 

 

From the math the calculation would be 925 in Cinebench at 4.5Ghz without a die shrink. 

http://www.overclockers.com/forums/showthread.php/731320-Just-Putzen-Round?p=7679222#post7679222

[Majestic]

If we were to look at the Phenom II for example. Had they die shrunk it, made it an 8 core it would in theory spit out scores that would actually rival the current Haswell CPUs. 

 

Not on the same amount of cores, and not at the same power consumption. I specifically said "efficiency", not raw performance in cinebench or something.

[Priller]

Not on the same amount of cores, and not at the same power consumption. I specifically said "efficiency", not raw performance in cinebench or something.

 

That's what Im saying. Had they brought that down to 32nm or below then power consumption should drop and they werent that bad.

[Majestic]

That's what Im saying. Had they brought that down to 32nm or below then power consumption should drop and they werent that bad.

 

Meh. I still think they wouldn't have nearly been as close as they should've been to stay competitive in an objective sense. And dieshrinking is srs business, maybe they just couldn't do it.

[IMPERIUS]

I really hope their 100-150$ cpus will keep 4 or more cores, if their architecture will be ok, Im switching

[lovingGamer]

But r9 300 will be out in 2015 right...

I hope that i don't have to wait 2016 

[Opcode]

Knowing AMD their next big release will be 6-12 months after they post a countdown timer giving Richard Huddy enough time to run around making shit up about the competition.

 

Relax fanboys, it's just tongue in cheek humour!

AMD's doors are pretty tightly sealed as of late. As so we don't even know much about Carrizo that's suppose to be due early next year. I wouldn't expect much hype coming out due to what happened with Bulldozer.

 

I don't see AMD coming with a chip that suddenly is 300% better than they currently put out. Not unless they cheated somehow.

Currently, the 4770K is 252% more efficient than the 8350 (performance/watt). 

 

I'm sorry, I just don't see it become the objective choice. People are mostly going to buy Zen CPU's out of fanboyism and being misinformed I fear. Much like they're still buying FX CPU's right now, since there is no reason you should.

Excavator is actually 40% more power efficient over Steamroller. Given the full node improvement from HDL it's performance per watt is equally better. If AMD built a FX-8350 out of Excavator it would be easily 50% more power efficient in comparison to the current FX-8350. Tho for some reason AMD doesn't want to release Bdver3/4 as enthusiast grade chips. I imagine the hassle of updating BIOS and what not is just too overwhelming for consumers. Let alone they probably have quite a bit of Bdver2/3 stock laying around that they want to get rid of before Zen. Instead they will just wait until Zen and launch an entirely new platform. All we can do right now is hope Carrizo makes it to the desktop because I would upgrade to a Athlon x4 960k in a heartbeat if it brings more than 15% IPC gains over Bdver3.

 

Would that fit inside the IHS or require it to be stacked sideways would be my question.

 

 

If we were to look at the Phenom II for example. Had they die shrunk it, made it an 8 core it would in theory spit out scores that would actually rival the current Haswell CPUs. 

 

I had someone run tests on his Phenom at various frequencies to look at scaling and even if you were to go with the low side it would be better then FXs. Not to mention Phenom IIs have a 1+Ghz advantage in IPC on FXs.

It would fit under the IHS and the die size wouldn't grow but only vertically ever so slightly.

 

---

HBM                                                  CU's

---

| | | TSV's | | |          Interposer          | | | TSV's | | |

---

PCB

---

 

HBM would feed the CU's through TSV's. As to how tall the die would become I don't imagine it would change all too drastically (not even enough to warrant a new socket design).

[Guest]

There's no reason to buy anything other than a 750ti/970/980 imo right now (from nvidia). Everything else is irrelevant.

 

AMD has 260x/270/270x/280/280x/290(x) and they're ALL viable. 760/770/780/780ti are overpriced and not worth it right now imo. AMD's cards at the same performance range handily beat them in price/performance.

Wellllll I wouldn't call the r9 290 mid range but maybe I am biased because I have one.

[Opcode]

Wellllll I wouldn't call the r9 290 mid range but maybe I am biased because I have one.

It will be once the R9 390x monster drops

[Guest]

It will be once the R9 390x monster drops

By then I  will xfire another one  B)

[Opcode]

By then I  will xfire another one  B)

Which will sadly still get beaten if R9 390X specifications are true

[Guest]

Which will sadly still get beaten if R9 390X specifications are true

Nu-Uh!

 

Either way, still very powerful, or I will sell my 290 and get a 390 then.

[Opcode]

Nu-Uh!

 

Either way, still very powerful, or I will sell my 290 and get a 390 then.

I would go with Crossfire 290's due to the fact they will become cheap used once everyone starts jumping onto the R9 300 series bandwagon. With perfect 100% scaling Crossfire 290's might perform better than the R9 390X. Tho the memory bandwidth the R9 390X has is just massive... Won't know until that monster releases. 

 

Not trolling just constructive conversation :-D