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Rumor: AMD to go LGA with AM5, PCIe Gen 5 limited to only EPYC CPUs for Zen 4 Update: More leaks

Random_Person1234
Go to solution Solved by Random_Person1234,

Update: Executable Fix has now leaked more stuff. Zen 4 Raphael (first consumer Zen 4 chip) will support DDR5 (as expected), but unlike Intel Alder Lake, it will not also support DDR4. Raphael will have 28 PCIe 4.0 lanes, up from Zen 3's 24. The chips will have a 120W TDP, with a 170W special variant also possible. Executable Fix also leaked a picture of the LGA 1718 pads on the CPU.

Here it is compared to LGA 1700 (Alder Lake socket):

Spoiler

AMD-Raphael-AM5-vs-Intel-AlderLake-LGA1700-768x504.jpg

 

29 minutes ago, Quackers101 said:

*supports standards of having no pins on either*

I like the idea of a CGA (contact-grid array) socket, but the problem is that if any dust gets in there and prevents contact you'll have problems.

 

Something that might work is connecting it similar to how the Raspberry Pi 4 Compute Module works, like this:

Spoiler

fe308f72-c374-477e-95de-a4179c40af26_CM4%2BBACK_.jpg

 

elephants

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