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Future nvidia gpus

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OP is referencing this: http://www.anandtech.com/show/7900/nvidia-updates-gpu-roadmap-unveils-pascal-architecture-for-2016

 

PascalBoard_575px.jpg

 

 

 

But the rabbit hole goes deeper. To pull off the kind of transfer rates NVIDIA wants to accomplish, the traditional PCI/PCIe style edge connector is no good; if nothing else the lengths that can be supported by such a fast bus are too short. So NVLink will be ditching the slot in favor of what NVIDIA is labeling a mezzanine connector, the type of connector typically used to sandwich multiple PCBs together (think GTX 295). We haven’t seen the connector yet, but it goes without saying that this requires a major change in motherboard designs for the boards that will support NVLink. The upside of this however is that with this change and the use of a true point-to-point bus, what NVIDIA is proposing is for all practical purposes a socketed GPU, just with the memory and power delivery circuitry on the GPU instead of on the motherboard.
NVIDIA’s Pascal test vehicle is one such example of what a card would look like. We cannot see the connector itself, but the basic idea is that it will lay down on a motherboard parallel to the board (instead of perpendicular like PCIe slots), with each Pascal card connected to the board through the NVLink mezzanine connector. Besides reducing trace lengths, this has the added benefit of allowing such GPUs to be cooled with CPU-style cooling methods (we’re talking about servers here, not desktops) in a space efficient manner. How many NVLink mezzanine connectors available would of course depend on how many the motherboard design calls for, which in turn will depend on how much space is available.

However, as i discussed with a friend of mine on skype, it is unlikely this will be the case once they actually roll around. I still think traditional PCIe slots will exist, and that NVLink will be adapted in another fashion.  After all, that article is over 2 years old now, and we still have not reached the full limitations of PCIE 3.0 yet. 

I don't really get it either? Especially with pcie 4.0 coming. That will have retarded bandwidth. Maybe if they can't figure out what comes after that nvidia will have to step up on the gpu side and do something interesting but I don't really see that happening. 

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I don't see how that would improve performance nor do I see how it's physically possible.

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i dont think that will happen because of pascal will be PCI E 3.0 or at least the first iteration will be. nvidia would not change the pci e connector because then motherboard manufacturers would have to make new motherboads for the sake of one gpu

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i dont think that will happen because of pascal will be PCI E 3.0 or at least the first iteration will be. nvidia would not change the pci e connector because then motherboard manufacturers would have to make new motherboads for the sake of one gpu

Actually I think it could even be PCIE 4.0 by the time it comes out, which should be plenty of bandwidth.

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Actually I think it could even be PCIE 4.0 by the time it comes out, which should be plenty of bandwidth.

Not even plenty, it would be way too much for a long time xD 

 

We're not even close to PCIe 3.0 16x. Cards that need more bandwidth than that will be insanely fast compared to current ones. 

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Actually I think it could even be PCIE 4.0 by the time it comes out, which should be plenty of bandwidth.

yes exactly and forcing people to change to somthing there not used to i never a good idea and i dont think nvidia would risk there 80 percent market share for the sake of a vertical card.

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Are you talking about NVlink? NVlink should increase the rate at which the CPU and GPU can interact and also increases bandwidth by a great deal so that's probably what you are thinking about. 

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Not even plenty, it would be way too much for a long time xD 

 

We're not even close to PCIe 16x. Cards that need more bandwidth than that will be insanely fast compared to current ones. 

PCIe *3.0* x16. The generation is important - we have saturated PCIe 1.0 x16 for example.

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i heard that the new gpus (pascal or volta) will not be perpendicular to the mobo and that instead they will be parallel to it(for better bandwith), can any1 confirm that with a source?

 

I believe you're referring to HBM, like how AMD has theirs.  The VRAM is stacked on the GPU core or directly next to it to improve bandwidth and save on silicone costs for the PCB, as well as generally less complex electrical traces.

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they wrote something about being able to mount the cpu coolers the same way on the new gpus, im searching the post but i cant find it

I believe you're referring to HBM, like how AMD has theirs.  The VRAM is stacked on the GPU core or directly next to it to improve bandwidth and save on silicone costs for the PCB, as well as generally less complex electrical traces.

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how does nvlink physically look like? Any1 knows?

Blog post directly from NVIDIA: http://blogs.nvidia.com/blog/2015/04/23/data-in-the-fast-lane-how-nvlink-unleashes-application-performance/

They have a Youtube video embedded in there showing how it works. I did not find any physical slot.

"It pays to keep an open mind, but not so open your brain falls out." - Carl Sagan.

"I can explain it to you, but I can't understand it for you" - Edward I. Koch

"I didn't die! I performed a tactical reset!" - Apollolol

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