Amd new ageesa
Just now, Ebony Falcon said:So is it the f clock holding it back ?
Nope, FCLK is completely desynched on Ryzen 7000, where whether you're running at DDR5 6000, 6400, or 8000 it will hit have the FCLK at 2000MHz by default. It was the UCLK holding it back in 1:1 mode, and it's probably going to be board signal integrity holding it back in 2:1 mode.
Just now, WereCat said:I thought its no longer necessary or it makes little difference for FCLK to be in either 1:1 or 2:1 on Zen4.
So kinda, pretty sure there's some misconceptions about this. The FCLK did need to be in a 1:1:1 ratio back in Ryzen 3000/5000 for the best performance, and that need was dropped with Ryzen 7000 where you can have any relationship you want between those (say 2133MHz FCLK and DDR5 5800). However, the memory controller clock (UCLK) and memory clock (MEMCLK) still need to be in a 1:1 ratio or a 2:1 ratio as they did with Ryzen 3000/5000. If you've heard people talk about Gear mode on Intel, that's essentially what it is on AMD, where in 1:1 the memory controller and memory run at the same frequency resulting in lower latency, while in 2:1 mode the memory controller runs at half the frequency of the memory resulting in worse latency but higher memory speeds and therefore a theoretical higher peak bandwidth if the memory is clocked up enough.
AMD did say initially that 6000 CL30 was the sweet spot so the 2:1 mode might not be worthwhile outside a few benchmarks, though until people have time to benchmark it we won't know if that was because they just hadn't gotten 2:1 mode working yet where it will have good performance when clocked high enough, or if the latency penalty really is great enough that you can't overcome it with high clocks and tight timings like you could somewhat do on Intel.

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