Why 5nm for 4070?

[Haswellx86]

What could possibly benefit Nvidia to produce 4070s with 5nm process node when the 4nm is already there?

[igormp]

To use a new node you need to design it and also make a reserve for some production capacity. Ada was already designed for 5nm and nvidia likely already had reservations made for their entire lineup in 5nm, reducing the volume on 5nm in order to have only a single line on 4nm means that that 4nm would be way more expensive (because smaller nodes are more expensive), but would also make other products more expensive (since you would have less of a volume discount).

[OhYou_]

because nvidia literally lost their ass man, they got absolutely destroyed by the crypto crash. 

[YoungBlade]

TSMC "4nm" is just their branding a refined version of TSMC's 5nm node. It's basically 5nm+, but it's still actually 5nm, which is why Techpowerup says that all the 40 series are on the 5nm node - because they are.

 

Where are you seeing it reported that the 4070s use a different version from the 4080 and 4090?

[igormp]

3 minutes ago, YoungBlade said:

TSMC "4nm" is just their branding a refined version of TSMC's 5nm node. It's basically 5nm+, but it's still actually 5nm, which is why Techpowerup says that all the 40 series are on the 5nm node - because they are.

 

Where are you seeing it reported that the 4070s use a different version from the 4080 and 4090?

It's the other way around, OP is complaining that the 4070 won't be using 4nm instead of 5nm.

[YoungBlade]

5 minutes ago, igormp said:

It's the other way around, OP is complaining that the 4070 won't be using 4nm instead of 5nm.

I don't think you understood what I wrote. I know that's what the OP is saying, I'm asking where they heard that.

 

I can't find this information online that says the 4070 uses the un-refined 5nm node and not the newer, refined 5nm+ "4nm" 5nm one.

 

"4nm" is just a brand name. The node is still 5nm. But, likely due to the whole "14nm+++++++" jokes about Intel, fabs now give their refined nodes new names with smaller numbers to imply that they are a new node, even when they are not.

[RVRY]

Nanometers don't mean anything to be honest... 

[YoungBlade]

1 minute ago, RVRY said:

Nanometers don't mean anything to be honest... 

Yes and no.

 

They mean something when they do and they don't mean anything when they don't.

 

[RVRY]

2 minutes ago, YoungBlade said:

Yes and no.

 

They mean something when they do and they don't mean anything when they don't.

 

In this case they don't, the 4 in 4N has nothing to do with the width of the actual transition. It just denotes its an improved version of their 5nm process made for Nvidia.  

[starsmine]

8 minutes ago, RVRY said:

Nanometers don't mean anything to be honest... 

They dont mean nanometers.
They still mean a whole node change and density increase.

[YoungBlade]

1 minute ago, RVRY said:

In this case they don't, the 4 in 4N has nothing to do with the width of the actual transition. It just denotes its an improved version of their 5nm process made for Nvidia.  

Yes, like I said:

13 minutes ago, YoungBlade said:

"4nm" is just a brand name. The node is still 5nm. But, likely due to the whole "14nm+++++++" jokes about Intel, fabs now give their refined nodes new names with smaller numbers to imply that they are a new node, even when they are not.

[starsmine]

3 minutes ago, RVRY said:

In this case they don't, the 4 in 4N has nothing to do with the width of the actual transition. It just denotes its an improved version of their 5nm process made for Nvidia.  

4N node is still denser and more power efficient then 5n, its more then just "5n+" TSMC has sub names for 5n that denote a simple "improved" 5N, such as 5NP

Like how 6nm is a half node for 7nm, its still "7nm"

but 7nm has N7, N7P, and N7+ all under TSMC. And each of those have more sub types 240HD, (high density) and 300HP (High power)

[RVRY]

1 minute ago, starsmine said:

4N node is still denser and more power efficient then 5n, its more then just "5n+" TSMC has sub names for 5n that denote a simple "improved" 5N, such as 5NP

It still has nothing to do with the nanometer width of the actual transistor. 

[starsmine]

Just now, RVRY said:

It still has nothing to do with the nanometer width of the actual transistor. 

Cool?

You said it was meaningless.

Its NOT meaningless. it just does not mean nanometer anymore.

[RVRY]

5 minutes ago, starsmine said:

Cool?

You said it was meaningless.

Its NOT meaningless. it just does not mean nanometer anymore.

It is meaningless because nobody measures it consistently, it literally does not convey what it is supposed to. 

Edit: For example Intel's 10nm process is more dense than TSMC's 7nm. 

[Eigenvektor]

13 minutes ago, RVRY said:

It is meaningless because nobody measures it consistently, it literally does not convey what it is supposed to. 

Edit: For example Intel's 10nm process is more dense than TSMC's 7nm. 

You can't use it to compare manufacturing processes between different manufacturers, true. You can still say that TSMC's 4N is better than their 5N node.

 

Even when it still refered to the width of some particlar part of a chip, it wasn't really meaningfull to compare ICs based on that value alone.

[YoungBlade]

8 minutes ago, RVRY said:

It is meaningless because nobody measures it consistently, it literally does not convey what it is supposed to. 

Edit: For example Intel's 10nm process is more dense than TSMC's 7nm. 

And that's why Intel rebranded it to "Intel 7" - to denote that it was closer to TSMC 7nm than to other nodes.

 

That's why I try to always specify which company we're talking about when talking about nodes, because "TSMC N5" and "Intel 4" and "Samsung 5LPE" all mean something different, even if they are all "5nm" processes.

 

And at the end of the day, what really matters is the performance you get from them, and how widely available they are (read: wafer cost and supply).

 

I remember the Intel 14nm++++₊₊++^++∞ days, and Intel fanbois would come on here and talk about how Intel 10nm is better than TSMC 7nm. And my response was always the same: "Great, then they should put it in some chips, make them work properly, and let us buy them." Because as long as all of this stuff is on paper, frankly, it doesn't matter to any of us.

 

So, back to my question to the OP: @NvidiaFirePro6900XXTX3DPRO, where did you hear that the 4070s don't use the "4nm" TSMC N4 node?

[igormp]

40 minutes ago, YoungBlade said:

I can't find this information online that says the 4070 uses the un-refined 5nm node and not the newer, refined 5nm+ "4nm" 5nm one.

 

It uses the AD104 of the 4070ti, which is on 5nm. Bunch of places also list it as 5nm:

https://www.techpowerup.com/gpu-specs/geforce-rtx-4070.c3924

[YoungBlade]

1 minute ago, igormp said:

It uses the AD104 of the 4070ti, which is on 5nm. Bunch of places also list it as 5nm:

https://www.techpowerup.com/gpu-specs/geforce-rtx-4070.c3924

That's because TSMC N4 "4nm" IS 5nm.

 

The other 40 series cards all say the same thing.

 

https://www.techpowerup.com/gpu-specs/geforce-rtx-4090.c3889

[Somerandomtechyboi]

Lmao everyone going nuts with the fucking process node

 

ffs thats simply just some random ass spec, what really matters is power efficiency, clock capabilties, and performance/ipc

[igormp]

1 minute ago, YoungBlade said:

That's because TSMC N4 "4nm" IS 5nm.

 

The other 40 series cards all say the same thing.

 

https://www.techpowerup.com/gpu-specs/geforce-rtx-4090.c3889

Even though it's just an improvement over 5nm, it's still called 4nm and all Ada products are 5nm, not the improved node.

The H100 is the only product on 4N (as usual for their x100 compute offerings):

https://www.techpowerup.com/gpu-specs/h100-pcie.c3899

[igormp]

Just now, Somerandomtechyboi said:

Lmao everyone going nuts with the fucking process node

 

Gods sake thats simply just some random ass spec, what really matters is power efficiency, clock capabilties, and performance/ipc

Yeah, and OP was wondering why they aren't using a newer node for a newer product given those benefits that matter, which I hope I have answered in the first reply to this topic.

[YoungBlade]

2 minutes ago, igormp said:

Even though it's just an improvement over 5nm, it's still called 4nm and all Ada products are 5nm, not the improved node.

The H100 is the only product on 4N (as usual for their x100 compute offerings):

https://www.techpowerup.com/gpu-specs/h100-pcie.c3899

Then why does every article I can find about the launch of the 4090 say that it's using the TSMC N4 process?

 

https://www.digitaltrends.com/computing/nvidia-geforce-rtx-4090-review/

https://www.techspot.com/news/96044-expensive-first-reactions-nvidia-rtx-4090-rtx-4080.html

 

And Wikipedia says so as well: https://en.wikipedia.org/wiki/Ada_Lovelace_(microarchitecture)
 

Do you have any sources that say otherwise?

[igormp]

6 minutes ago, YoungBlade said:

Then why does every article I can find about the launch of the 4090 say that it's using the TSMC N4 process?

 

https://www.digitaltrends.com/computing/nvidia-geforce-rtx-4090-review/

https://www.techspot.com/news/96044-expensive-first-reactions-nvidia-rtx-4090-rtx-4080.html

 

And Wikipedia says so as well: https://en.wikipedia.org/wiki/Ada_Lovelace_(microarchitecture)
 

Do you have any sources that say otherwise?

I stand corrected. It is indeed 4N, also shown in the AD102 whitepaper:

https://images.nvidia.com/aem-dam/Solutions/geforce/ada/nvidia-ada-gpu-architecture.pdf

Quote

Ada GPUs are fabricated on TSMC’s 4N manufacturing process. NVIDIA engineers worked closely with TSMC to optimize the process for GPU production.

 

Going back to OP's question then:

1 hour ago, NvidiaFirePro6900XXTX3DPRO said:

What could possibly benefit Nvidia to produce 4070s with 5nm process node when the 4nm is already there?

They are already using it.

[iameatingjam]

5 hours ago, igormp said:

To use a new node you need to design it and also make a reserve for some production capacity. Ada was already designed for 5nm and nvidia likely already had reservations made for their entire lineup in 5nm, reducing the volume on 5nm in order to have only a single line on 4nm means that that 4nm would be way more expensive (because smaller nodes are more expensive), but would also make other products more expensive (since you would have less of a volume discount).

I thought I read an article that tsmc isn't doing volume discounts anymore. But perhaps it was only a certain line of chips.