Newer CPU PCIe and DMI confusion

[luckywales]

Hi everyone - let me begin by saying I've seen posts that are similar to this but don't appear to address my direct concern (including the PCIe misconception thread).

 

I currently have an i7-6850k on an X99 board, and am about to upgrade.  I purchased this to take advantage of (almost all) the available PCIe lanes from the CPU...not CPU + chipset...just the CPU, which had 40 lanes.  Included in my setup are two M2 NVME PCIe drives that I think are taking full advantage of this setup on my motherboard (960 pros).

 

Has something fundamental changed over the last 3 years?  I'm asking because when I look at the latest i7-9700k, it has less lanes.  Whilst I understand that the CPU, plus the chipset lanes (on say a Z390) sum to 40 or more, aren't the lanes which are additional to the CPU just sharing the same Direct Media Interface (DMI) bandwidth?  Or is something else happening in the background?  Does this cause a bottleneck to the 970 pro speeds that I think I'll purchase for the M2 slots?

 

I'm not sure I'm asking the right question here, but with multiple GPUs, LAN and wifi cards will I be able to dedicate the entire bandwidth to my two M2 drives (not worried about the board shutting off SATA ports)?

I've looked at 4 YouTube videos on the basics of PCIe lanes vis-a-vis CPU and chipset, but I can't find an answer to the fundamental issue that the chipset might ultimately be dividing up the available bandwidth made available by the CPU.  So did we go backwards in reducing the number of CPU lanes??  That can't be right?  Right?

[Zagna]

You're comparing a i7-6850K which is a HEDT chip to a mainstream i7-9700K.

Mainstream has always had 16 CPU lanes + whatever PCH gives. HEDT always has more so you could look at the i9 series for 44 PCIe CPU lanes.

[Jurrunio]

2 minutes ago, luckywales said:

Has something fundamental changed over the last 3 years?

On Intel mainstream platform as far as CPU PCIe lanes go, no change happened.

 

3 minutes ago, luckywales said:

I'm asking because when I look at the latest i7-9700k, it has less lanes.

what do you expect when you step away from Intel HEDT platform?

 

3 minutes ago, luckywales said:

aren't the lanes which are additional to the CPU just sharing the same Direct Media Interface (DMI) bandwidth?  Or is something else happening in the background?

They are separate. DMI is what Intel calls the connection between the CPU and chipset (was south bridge), while PCIe lanes directly from the CPU in a direct connection. In other words, they are on the same level rather than a master/slave relationship. This has been the case for quite some time now, even before X99.

 

6 minutes ago, luckywales said:

Does this cause a bottleneck to the 970 pro speeds that I think I'll purchase for the M2 slots?

I dont know if your board splits the CPU PCIe lanes the GPU gets to the SSDs, but if it doesnt then both SSDs are crammed into the PCIe lanes from the chipset, giving a total of PCIe 3.0 x4 bandwidth (along with other stuff that are already connected to chipset like USB devices and SATA devices). I dont know how fast a pair of 970 Pro can reach, but if they can top the PCIe 3.0 x4 bandwidth then it will bottleneck.

 

9 minutes ago, luckywales said:

I'm not sure I'm asking the right question here, but with multiple GPUs, LAN and wifi cards will I be able to dedicate the entire bandwidth to my two M2 drives (not worried about the board shutting off SATA ports)?

I dont know about server boards, but you can't in mainstream boards.

 

10 minutes ago, luckywales said:

I've looked at 4 YouTube videos on the basics of PCIe lanes vis-a-vis CPU and chipset, but I can't find an answer to the fundamental issue that the chipset might ultimately be dividing up the available bandwidth made available by the CPU.  So did we go backwards in reducing the number of CPU lanes??  That can't be right?  Right?

PCIe lanes from the CPU and PCIe lanes from the chipset are run separately. That easier to understand?

[luckywales]

19 minutes ago, Jurrunio said:

On Intel mainstream platform as far as CPU PCIe lanes go, no change happened.

 

what do you expect when you step away from Intel HEDT platform?

 

They are separate. DMI is what Intel calls the connection between the CPU and chipset (was south bridge), while PCIe lanes directly from the CPU in a direct connection. In other words, they are on the same level rather than a master/slave relationship. This has been the case for quite some time now, even before X99.

 

I dont know if your board splits the CPU PCIe lanes the GPU gets to the SSDs, but if it doesnt then both SSDs are crammed into the PCIe lanes from the chipset, giving a total of PCIe 3.0 x4 bandwidth (along with other stuff that are already connected to chipset like USB devices and SATA devices). I dont know how fast a pair of 970 Pro can reach, but if they can top the PCIe 3.0 x4 bandwidth then it will bottleneck.

 

I dont know about server boards, but you can't in mainstream boards.

 

PCIe lanes from the CPU and PCIe lanes from the chipset are run separately. That easier to understand?

Thank you very much for your responses, and breaking it out into component parts.  You have the answers...I just need to ask the right questions  so please bear with me...

 

Let's get rid of a hypothetical and provide an example - let's use the Tomahawk Z390 as the board I'm thinking of pairing with a 9700k.

 

What did you mean when you said "when you step away from Intel HEDT platform?"...I guess I thought upgrading a processor was...upgrading it.  Am I somehow not upgrading the same "type" of processor?

 

When you say that CPU lanes and chipset lanes are run separately...could you please clarify as this might be the very crux of my (mis)understanding.  Does that mean that no DMI bandwidth is shared for the use of any PCIe lanes? Do you mean that I can treat all 40 lanes (CPU + chipset) in the same way as I previously treated the 40 available from only the 6850k processor?

[Fasauceome]

52 minutes ago, luckywales said:

What did you mean when you said "when you step away from Intel HEDT platform?"...I guess I thought upgrading a processor was...upgrading it.  Am I somehow not upgrading the same "type" of processor?

Yes, Intel makes High End DeskTop CPUs, in a bigger socket with special features. x99 is a larger CPU socket overall, LGA 2011 to be specific. The i7 9700k and i9 9900k and the like are on LGA 1151, smaller socket. Doesn't have quad channel, less PCIe, etc.

[Jurrunio]

1 hour ago, luckywales said:

That did you mean when you said "when you step away from Intel HEDT platform?"...I guess I thought upgrading a processor was...upgrading it.  Am I somehow not upgrading the same "type" of processor?

mainstream platform atm for Intel include CPUs like the 9700k, 9900k, 8600k etc. HEDT (high end desktop, I call it "buy if it makes you money") platform is the 9920X, 9800X, 7820X, 7940X, 7980XE etc.

If you're unfamiliar with new CPUs, I can also give example on X99 gen stuff. Consumer platform CPUs are like the 4790k, 6600k, 6700k. HEDT platform CPUs include your 6850k, 5960x, 6950x etc.

 

They are the same type of CPU (different "type" will run on different instruction sets if you ask me), but they are different "platform" of products aimed at different customers.

 

In this case it is a small (about 20%) upgrade in compute performance (9700k performs like the 8700k which has same core and thread config, which is a bit faster than the 6850k) but with cutback PCIe lanes.

 

1 hour ago, luckywales said:

When you say that CPU lanes and chipset lanes are run separately...could you please clarify as this might be the very crux of my (mis)understanding.  Does that mean that no DMI bandwidth is shared for the use of any PCIe lanes?

No you got it wrong. Chipset PCIe lanes come from DMI connection, CPU PCIe lanes are directly from the CPU and not related to DMI. In other words you can bombard DMI with that pair of 970 Pro, that would slow down connection to devices connected to the chipset while those connected with CPU PCIe lanes arent affected at all.

 

1 hour ago, luckywales said:

Do you mean that I can treat all 40 lanes (CPU + chipset) in the same way as I previously treated the 40 available from only the 6850k processor?

970 Pro will definitely slow down when used in transfer work at the same time, but otherwise you shouldn't notice the difference.