If the M.2 enclosure from LTT's recent video doesn't support TRIM...
14 hours ago, NobleGamer said:Right, so let's say TRIM isnt important because we lean on drive's own maintenance.
That is why I brought up the example of:
- Crucial confirming that garbage collection happens at idle via their SSDs' firmware
- The enclosure from the LTT video saying on their own Amazon page that it will intentionally put the SSD to sleep after 10 minutes of idle.
Those two features seem diametrically opposed to each other, without knowing the exact timing of SSDs garbage collection, correct?
So my takeaway is that in order to ensure maintenance of an enclosure drive happens as often/normally as if it was physically attached to my motherboard, then the enclosure manufacturer needs to:
- Confirm UASP or TRIM support
- Not cause SSD to sleep faster than SSD garbage routines
...or just hope your manufacturer doesn't use old or lowsy parts/controller without UASP or TRIM.
GC still relies on TRIM to identify invalid pages more quickly but it is automatic at idle, yes. Enclosures have a sleep timer which can often be modified in firmware (for the bridge chip). Sufficient GC will probably be detected as the drive being active - the reason it's done during idle is so it doesn't interfere with host I/O. If you mean the enclosure goes to sleep before GC has time to kick in, I suppose that's possible, although running an optimize/TRIM would probably kick it into gear. The amount of idle time before GC varies and can be quite high/long on some drives but this time is also tracked such that the drive will engage it more quickly if necessary (e.g. if SLC is full).
Any USB3.0+ port will/should support UASP and through SCSI a method to discard. Certain older bridge chips may turn off the relevant block discard flag, probably because the chip manufacturers wanted to make newer products for more $ that had TRIM explicitly because the ability to support it is trivial (you can often modify firmware or workaround this limitation). In any case, any modern system and enclosure should have implicit support, although there are ways to test this (and also Windows seems to ignore this flag). I can say for sure that any 10Gbps chip is by far new enough.
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