Zen 4 vs 4c

porina · June 5

https://www.semianalysis.com/p/zen-4c-amds-response-to-hyperscale

Just reading up on the above link. Only part of it is available as full article is paywalled.

Been hearing about 4c cores for a while and the summary from there is:

Same logical design so no difference from software perspective
Reduction in size from combo of smaller L3 per CCX and denser layout in other areas - but same total L3 per CCD
Downside of dense layout may be lower clocks - can't tell from that article what the peak clock impact may be
16 core CCD, consisting of two 8 core CCX
4c may be already used in lower end 7040U series (peak clock high 4.x GHz)
Roughly speaking, you get 2 small cores in the space of a big cores. This compares with Intel's 1 P core is comparable in area to 4 E cores. AMD c cores retain SMT but Intel E cores do not have HT.

Each core is same peak IPC, but may be lower performance due to combination of cache and clock.

I haven't been looking at rumours so I'm just following on from the above. Could AMD deploy these in AM5? Say you get one CCD of 8 big cores as you currently do (and optional V-cache), 2nd CCD could be 16 small cores. You still get benefit of 8 big/fast cores, but if you multi-thread hard, you could go up to 48 threads. Paralleling the 7900X and 7950X it could be 6+12c and 8+16c offerings. The 7000X3D parts already show AMD can go somewhat unbalanced within a socket.

I have to wonder if the clock reduction is more due to the layout choices made, or more a power density thing? Power will play a part if they're all in use, but if you dump all the power into a single small core, how does it compare to a big core?

I'm assuming AMD wont be putting both types of core on a single piece of silicon, at least not outside of an APU-like approach.

adm0n · June 5

So from what I've heard, the important part is not the socket. They could probably put whatever they want on that socket, as long as they design it for that. I think the main reason, why they needed to change it, was power delivery.

The IO die, is what's important. So as long as they can make the connection work, they could potentially do what you've proposed. They'd probably need to redesign it slightly. And I guess the only way, that it would happen, is that intel actually threatens them in multi threaded applications. Also they'd need to do some actual development to schedule the workloads correctly in the same way as intel does it.

I think currently they are pretty content with their offering. Revenue from the PC market is down overall, so they also want to keep product costs down. So AMD sticking to their already completed design, is the most likely. I'm also not that on top of the rumors, but I think next gen could look pretty samey. Maybe we'll get a 32 core zen 5c chip though. That would be awesome. And I'm pretty sure that they have prototypes of what you've been describing. So if it makes sense, and they can make it work seamlessly, we'll get it at some point.