Ryzen+ 2600x and 2300x cinebench/Cpu-Z results leak (probably fake)

cj09beira · December 13, 2017

10 hours ago, Taf the Ghost said:

It was 48c/96t back in 2015 as "Starship". There's been one leak from a credible source with 16c design that would be right at the Tapeout range for 7nm. (It was the French site, and the much larger 16mb L3 Cache is the give away for where AMD would need to go for this type of design anyway.)

Zeppelin is an 8c design that's been used in Mainstream, HEDT and Server. I expect we're getting 2 designs for 7nm. "Rome" will be the Eypc 2 design for the highest Core Count, and then we'll have another design for Mainstream. Do they cross them over? How many cores are in the Mainstream design? Given that the area shrink is going to be fairly massive (14nm to 7nm is about a 1.5 node jump for AMD), they can fit a lot in there. So, we'll see.

if i was them i would make the designs like this: a lower core count but more optimized for high frequency with 12 cores inside it, and a 16c more server optimized, this would also benefit the server market because you could then sell the lower core count design as a cpu optimized for things that are less divisible, where the higher clocks would help more, then the 12c would probably have a 6 core ccx, where the 16 core would have a 4 core ccx, (sounds too close to each other, maybe 12c and 18 core, i dont know anymore )

Taf the Ghost · December 13, 2017

9 hours ago, cj09beira said:

if i was them i would make the designs like this: a lower core count but more optimized for high frequency with 12 cores inside it, and a 16c more server optimized, this would also benefit the server market because you could then sell the lower core count design as a cpu optimized for things that are less divisible, where the higher clocks would help more, then the 12c would probably have a 6 core ccx, where the 16 core would have a 4 core ccx, (sounds too close to each other, maybe 12c and 18 core, i dont know anymore )

The "Zen Design Philosophy" works best with the 4c CCX setup. You can stack them on a single die to some limit, as they call through the L3 Cache to each other. They're an opaque NUMA approach, but it's still very, very quick. Basic CCX to CCX call is faster than Intel's Mesh right now. (Both can be improved from Stock, but it's still faster.)

The issue is that, in 2015, it looked a lot like AMD was simply going to go up to 12c (so a 3 CCX design) for their single Zen2 approach. Given how well Ryzen has gone, it would appear they've added a dedicated Server design to stay ahead of Intel. The Zen Design, for servers, really just needs as many cores as they can put under the 8-node 2U setup. Given the way the Epyc packaging works, they can also package Mainstream and Server designs onto compatible packages, as well.

There is some inherent design limits to the Zen approach over Monolithic, but for AMD's fabless reality, those as a very cheap trade off. Considering Intel should be rolling out a 32c or 38c design next year for their top-SKU "Cascade Lake-SP", likely around a 800 mm² part, you can start to see the reasoning behind AMD's approach. Everything from there is pretty logical, once you can rivet down where AMD can go with the new design approach.

Another very interesting aspect, though it's probably a few years before we see this, but AMD could just replace a CCX with a GPU. I'm not quite sure the use-case for it, yet, but they could do an 8c + 2 GPU CCX server die without a great deal of trouble. Why? No clue! But someone might want it for a semi-custom solution.