960 EVO Samsung

[SilverineWolf]

I am thinking of getting the Samsung EVO 960 m.2 1TB though it is being marketed at a 3 Bit V-Nand MLC and other places are showing it as a TLC. 

From what I am reading that the TLC was a huge muck up before. Is it worth it or not. 

[SilverineWolf]

Then whats the difference?

[VerticalDiscussions]

Does it really matter .-.!? It performs great that is and its price is competitively positioned against Intel NVME offerings. Whats the issue about it?

[SilverineWolf]

longevity and the fact that Samsung decided to lower the Manufacturer warrenty by 2 years and it is half the TBW at 400 vs the 800 of the PRO version though the later is not as much an issue. just a curiosity. 

[SilverineWolf]

2 minutes ago, EnemySp0tt3d said:

 

Ok I saw that before and did my research. 

This clearly shows in writing small discrepancies VS what is being shown on the Samsung website.  

[SilverineWolf]

https://uk.hardware.info/comparisontable/products/266760-365566-365564

 

VS. 

http://www.samsung.com/us/computing/memory-storage/solid-state-drives/ssd-960-evo-m-2-1tb-mz-v6e1t0bw/

also see the video I linked above as well if you have not yet already. 

[SilverineWolf]

 

[Sniperfox47]

33 minutes ago, SilverineWolf said:

 

Oh god the guy's presentation on NVMe/PCIe vs AHCI/SATA screamed of "buy our solid State drives!!!!!" Most of the stuff that goes through those medium never touch local storage...

 

On a more relevant note, both the 960 Evo and 960 Pro use MLC 3D-VNAND.

 

The 960 Pro uses 2 bits per cell (traditional MLC) and the 960 Evo uses 3 bits per cell (TLC). TLC is a kind of MLC.

 

3DNAND has good properties for multi-bit rate operation so you don't need to worry about it being TLC. 3D TLC is actually more stable than 2D DLC in a lot of cases. In fact a couple companies are even looking to do 3D QLC with 4 bits per cell.

[SilverineWolf]

1 minute ago, Sniperfox47 said:

Oh god the guy's presentation on NVMe/PCIe vs AHCI/SATA screamed of "buy our solid State drives!!!!!" Most of the stuff that goes through those medium never touch local storage...

 

On a more relevant note, both the 960 Evo and 960 Pro use MLC 3D-VNAND.

 

The 960 Pro uses 2 bits per cell (traditional MLC) and the 960 Evo uses 3 bits per cell (TLC). TLC is a kind of MLC.

 

3DNAND has good properties for multi-bit rate operation so you don't need to worry about it being TLC. 3D TLC is actually more stable than 2D DLC in a lot of cases. In fact a couple companies are even looking to do 3D QLC with 4 bits per cell.

I am sorry to say that is and was their job to scream silently for them to purchase it. XD.....

 

What I am trying to understand as you mention and I am now understanding thanks to part of that video was the issue with the TLC and it seems it was more due to the generation rather then the method. I know MLC was not defined as 3 bits and that True TLC was defined as that though not quite explicitly.

 

It is so hard to get good information on things sometimes and either it is so far buried or very little is out about it at times. Is it not quite funny though that the port M.2 aka NGFF was around but largely ignored till recently in the last few years. I wonder if thunderbolt will also make a come back after being largely ignored though I have not looked much into it other then taking more PCIe lanes that are only recently being increased but at the premium at this time I wonder how much longer till they replace USB and PCIe replace SATA.  

[Sniperfox47]

2 minutes ago, SilverineWolf said:

It is so hard to get good information on things sometimes and either it is so far buried or very little is out about it at times. 

TLC is Triple Level Cell. All it means is that there are 3 bits per cell.

MLC is Multi Level Cell. All it means is that there are more than one bit per cell.

 

DLC (Dual Level Cell) is specifically two bits, but it's not commonly used because the industry for used to having only two and commonly uses MLC to refer to two bits.

 

QLC is Quad Level Cell and means that there are 4 bits stored per cell.

 

MLC is less reliable than SLC because of the need to keep track of variable voltage levels to record the different bits.

 

SLC has two voltages (on and off), while DLC needs 4 (3+off), TLC needs 8, and QLC will need a whopping 16 voltage levels tracked in each cell. These voltage levels can drop over time and cause errors which was the biggest problem in TLC prior to 3D NAND which is far more electrically stable than planar NAND. Correcting for the multiple voltages requires more power and lowers performance and lifespan, but drastically increases storage density.

 

This is why the 960 Evo has a weaker warranty than the 960 Pro, because it each cell has more wear on it due to the varrying voltage.

 

 

[SilverineWolf]

4 minutes ago, Sniperfox47 said:

TLC is Triple Level Cell. All it means is that there are 3 bits per cell.

MLC is Multi Level Cell. All it means is that there are more than one bit per cell.

 

DLC (Dual Level Cell) is specifically two bits, but it's not commonly used because the industry for used to having only two and commonly uses MLC to refer to two bits.

 

QLC is Quad Level Cell and means that there are 4 bits stored per cell.

 

MLC is less reliable than SLC because of the need to keep track of variable voltage levels to record the different bits.

 

SLC has two voltages (on and off), while DLC needs 4 (3+off), TLC needs 8, and QLC will need a whopping 16 voltage levels tracked in each cell. These voltage levels can drop over time and cause errors which was the biggest problem in TLC prior to 3D NAND which is far more electrically stable than planar NAND. Correcting for the multiple voltages requires more power and lowers performance and lifespan, but drastically increases storage density.

 

This is why the 960 Evo has a weaker warranty than the 960 Pro, because it each cell has more wear on it due to the varrying voltage.

 

 

True. Though I was confused at first since you mentioned DLC and previously had not heard that reference before you used and then later described it.

 

Found this for reference when searching for QLC http://www.theregister.co.uk/2016/07/28/qlc_flash_primer/

 

What is your take on the whole thing both on the evolution of computers from their data connectors to the hardware being developed today.

 

For myself I feel that they put too much effort on putting a band-aid on something that should of been exchanged for something else for too long on several ports myself. CPUs have changed very little over these few years with very little improvement overall period. While the innovation is there for new development they would rather build upon something that while it works but does not work well enough. Now I am not saying that we should have several new connectors every few months just a change that is standardized eventually.  

[Sniperfox47]

2 minutes ago, SilverineWolf said:

True. Though I was confused at first since you mentioned DLC and previously had not heard that reference before you used and then later described it.

 

Found this for reference when searching for QLC http://www.theregister.co.uk/2016/07/28/qlc_flash_primer/

 

What is your take on the whole thing both on the evolution of computers from their data connectors to the hardware being developed today.

 

For myself I feel that they put too much effort on putting a band-aid on something that should of been exchanged for something else for too long on several ports myself. CPUs have changed very little over these few years with very little improvement overall period. While the innovation is there for new development they would rather build upon something that while it works but does not work well enough. Now I am not saying that we should have several new connectors every few months just a change that is standardized eventually.  

The problem with changing connectors is that you break compatibility, and it takes so long for a new standard to roll out that you'd be breaking it just as it hits saturation.

 

It's already that way. Think of it. USB 3.0 A/B has only *really* been common on the market for a few years now, and it's being replaced with USB 3.1gen1/2 C. While USB 2.0 and 3.0 may look the same externally they're actually wired quite differently. The same goes for USB-C and the new CC and Sidebus Pins.

 

CPUs are about as good as they can get performance wise. There's not much more you can do for them other than improve performance to get small clock boosts, and even that's going to hit a cap shortly. The onus falls not on CPU designers at this point, but rather on programmers and algorithm researchers to take use of the features that are already there like SSE/AVX.

 

The market has innovated though. More and more things are moving towards more dedicated coprocessors to free up more of the CPU for tasks at hand. Sensor hubs, pattern recognition chips, GPU HSA, and many other systems are being set up to offload work from the CPU.

 

I don't see thunderbolt 3 replacing USB any time in the foreseeable future. There are just too many host that don't use Intel processors (pretty much every phone and tablet other than Windows ones, and AMD computers). Even if Intel opened the specs to let other host devices use it, most ARM chips don't have PCIe lanes to use in the first place.

 

That's not a bad thing though. The only real benefit of thunderbolt is the PCIe passthrough, and for most systems that's not the killer feature it's made out to be.

 

As far as NVMe/PCIe vs AHCI/SATA, I expect that it's going to move over quickly. NVMe drives are quickly becoming cheaper than their AHCI counterparts and are also quickly catching up on hard drives. Intel and AMD are both drastically expanding their available lanes too so we shouldn't see too much resistance in the way.

 

NVMe likely won't be very big in mobile though, since most of it's benefits are similar to those of UFS, but UFS has substantially lower power requirements and no need for PCIe lanes.

[SilverineWolf]

20 minutes ago, Sniperfox47 said:

The problem with changing connectors is that you break compatibility, and it takes so long for a new standard to roll out that you'd be breaking it just as it hits saturation.

 

It's already that way. Think of it. USB 3.0 A/B has only *really* been common on the market for a few years now, and it's being replaced with USB 3.1gen1/2 C. While USB 2.0 and 3.0 may look the same externally they're actually wired quite differently. The same goes for USB-C and the new CC and Sidebus Pins.

 

CPUs are about as good as they can get performance wise. There's not much more you can do for them other than improve performance to get small clock boosts, and even that's going to hit a cap shortly. The onus falls not on CPU designers at this point, but rather on programmers and algorithm researchers to take use of the features that are already there like SSE/AVX.

 

The market has innovated though. More and more things are moving towards more dedicated coprocessors to free up more of the CPU for tasks at hand. Sensor hubs, pattern recognition chips, GPU HSA, and many other systems are being set up to offload work from the CPU.

 

I don't see thunderbolt 3 replacing USB any time in the foreseeable future. There are just too many host that don't use Intel processors (pretty much every phone and tablet other than Windows ones, and AMD computers). Even if Intel opened the specs to let other host devices use it, most ARM chips don't have PCIe lanes to use in the first place.

 

That's not a bad thing though. The only real benefit of thunderbolt is the PCIe passthrough, and for most systems that's not the killer feature it's made out to be.

 

As far as NVMe/PCIe vs AHCI/SATA, I expect that it's going to move over quickly. NVMe drives are quickly becoming cheaper than their AHCI counterparts and are also quickly catching up on hard drives. Intel and AMD are both drastically expanding their available lanes too so we shouldn't see too much resistance in the way.

 

NVMe likely won't be very big in mobile though, since most of it's benefits are similar to those of UFS, but UFS has substantially lower power requirements and no need for PCIe lanes.

In regards to CPU the next step in my honest opinion is optical CPU that uses properties based off of light rather then just electricity but that would also mean a remapping of motherboard eventually as well as redesigning the circuitry of the computer to take advantage but we are many years off of that from what one of my friends mentioned. Would be interesting to see it happen. They have already proven the speed of making the I/O ports optical vs electric based. It is only a matter of time.  http://news.berkeley.edu/2015/12/23/electronic-photonic-microprocessor-chip/ 

And http://wccftech.com/light-based-processor-developed-by-scientists/

[Sniperfox47]

17 minutes ago, SilverineWolf said:

In regards to CPU the next step in my honest opinion is optical CPU that uses properties based off of light rather then just electricity but that would also mean a remapping of motherboard eventually as well as redesigning the circuitry of the computer to take advantage but we are many years off of that from what one of my friends mentioned. Would be interesting to see it happen. They have already proven the speed of making the I/O ports optical vs electric based. It is only a matter of time.  http://news.berkeley.edu/2015/12/23/electronic-photonic-microprocessor-chip/ 

I'll be interested to see where photonics takes things. I don't see them on the consumer side anytime in the foreseeable future. For consumerland QPI and PCIe handle things just fine. It's the same idea of why we won't see NVLink replace SLI for Nvidia on the consumer side anytime soon.

[SilverineWolf]

 

2 minutes ago, Sniperfox47 said:

I'll be interested to see where photonics takes things. I don't see them on the consumer side anytime in the foreseeable future. For consumerland QPI and PCIe handle things just fine. It's the same idea of why we won't see NVLink replace SLI for Nvidia on the consumer side anytime soon.

I think it would take more affect as we move towards VR as the transfer rate needs increases as the graphical interface gets more demanding. Though to be honest we are many many years from true VR but it will be very interesting to see where it goes when we do get there.