BCLK overclocking? Latency?

[r00tb33r]

Question is about BCLK overclocking...  Seems Intel allows about 3% margin on BCLK on locked parts.  I read a comment about latency penalty when BCLK is anything other than 100MHz?  Is that because of loss of synchronicity?

 

Is it really not worth it?

[Somerandomtechyboi]

Not sure about latency penalty

I suggest setting bclk to 102.9 and see if performance dips or not, its such a tiny adjustment that its basically guaranteed to be stable

 

data corruption should not be of any concern as much as ppl that have never tried bclk oc will tell you otherwise, i suspect its similar to ram oc as in when you set a particularly unstable setting with enough bad luck and instability some data corruption can occur, but this is something ill have to verify for myself

[r00tb33r]

1 minute ago, Somerandomtechyboi said:

Not sure about latency penalty

I suggest setting bclk to 102.9 and see if performance dips or not, its such a tiny adjustment that its basically guaranteed to be stable

 

data corruption should not be of any concern as much as ppl that have never tried bclk oc will tell you otherwise, i suspect its similar to ram oc as in when you set a particularly unstable setting with enough bad luck and instability some data corruption can occur, but this is something ill have to verify for myself

On locked parts we're talking multipliers somewhere in the ballpark of 50, give or take.  44.  That means we're talking about a gain of like 130MHz.  It's not huge, but also not nothing.  Still, not significant.  Which is why I wonder if there are downsides to this that outweigh the benefits.

 

This assumes that PCIE clock will be separate and kept at 100, because in my tests in the past, my NVMe was already unhappy at 101MHz.  So if you keep PCIE clock at 100 there's no corruption concern.  But does that introduce latency through loss of synchronicity?  That's my OP question.

[Somerandomtechyboi]

Just now, r00tb33r said:

On locked parts we're talking multipliers somewhere in the ballpark of 50, give or take.  44.  That means we're talking about a gain of like 130MHz.  It's not huge, but also not nothing.  Still, not significant.  Which is why I wonder if there are downsides to this that outweigh the benefits.

 

This assumes that PCIE clock will be separate and kept at 100, because in my tests in the past, my NVMe was already unhappy at 101MHz.  So if you keep PCIE clock at 100 there's no corruption concern.  But does that introduce latency through loss of synchronicity?  That's my OP question.

Basically you are asking about bclk strap not actual bclk where the strap only affects cpu and ram speeds but nothing else

 

honestly im not sure, i doubt theres any actual losses though, so go ahead and try i guess, see for yourself

[SorryBella]

5 hours ago, r00tb33r said:

 

Is it really not worth it?

Yep. Its not only the mis-sync, its also the higher strain on practically anything that the CPU handles, hence the possibility of just straight up bricking an nvme install.

[r00tb33r]

3 hours ago, SorryBella said:

Yep. Its not only the mis-sync, its also the higher strain on practically anything that the CPU handles, hence the possibility of just straight up bricking an nvme install.

Wait, but I said PCIE clock is separated and runs at the same old 100MHz, meaning there can't be problems with NVMe.

 

What there can be is a delay from having to buffer data to move it across the edge of clock domains, if you understand what that means, engineering terms here.  That's what this thread is about.

 

When both BCLK and PCIE clock are the same clock domain then data can be moved synchronously without a buffer.

 

But, the scenario discussed here is strictly BCLK =/= PCIE clock.

 

In fact, TechPowerup lists benchmarks with BCLK overclock on locked chips when it is possible, and in synthetic it typically scores better.

[r00tb33r]

 

 

How many other boards can do this?