Electronics Q: Asynchronous D flip-flop counter PROBLEM!!!

[Ahsan]

Hi so the problem:

Design a 3 bit up counter that automatically stops when the count reaches 7. Include a Reset Button (PB_DPST).

 

PLEASE HELP THIS IS DUE TOMORROW D:

I am using Multisim to create the circuit

[Ahsan]

CMONNN SOMONE

[gergy008]

We're not monkeys here to do your homework, I'm pretty sure they teach you how to work out the problem for yourself or they wouldn't have given it you.
Also not many of the "tech people" on here went to university to do computer science, many of us have decent jobs and have computing as a hobby.

 

That being said 7 is only a 3-bit number and you could easily implement a 4-bit adder that adds the output from a standard D flip-flop and places it back into the 3-bit 'register', where it can repeat over and over.

To stop the 4-bit adder from adding 0001 to 0111 to make it 1000 and removing the 7, you could just implement a manual override to stop (With an AND gate or something) when the 4th bit is one.

[Ahsan]

We're not monkeys here to do your homework, I'm pretty sure they teach you how to work out the problem for yourself or they wouldn't have given it you.

Also not many of the "tech people" on here went to university to do computer science, many of us have decent jobs and have computing as a hobby.

 

That being said 7 is only a 3-bit number and you could easily implement a 4-bit adder that adds the output from a standard D flip-flop and places it back into the 3-bit 'register', where it can repeat over and over.

To stop the 4-bit adder from adding 0001 to 0111 to make it 1000 and removing the 7, you could just implement a manual override to stop (With an AND gate or something) when the 4th bit is one.

You made me sound like a hypocrite there sir

but thanks