Verilog text reader

[79wjd]

I have to write code that takes a three bit input and determines if it is the correct input. 

 

The purpose is to look for the letter L. So, if the input is: (each column is one input)

[0][1][0][0]

[0][1][0][0]

[0][1][1][0]

then it outputs an L, if it's not then it will go back to the next appropriate step. 

• Garbage step: nothing matches the required pattern and you must start from scratch -- must have an all 0 input before you can move to the next step. 
• Step A: Have three 0-bit inputs: [0][0][0] (in a column).
• Step B: Have three 0-bit inputs followed by three 1-bit inputs.
• Step C: Have three 0-bit inputs followed by three 1-bit inputs followed by two 0s and and a 1. 
• Step D: Have three 0-bit inputs followed by three 1-bit inputs followed by two 0s and and a 1 followed by three 0's. 

For example if I have: 

[0][1]

[0][1]

[0][1]

and the next input is

[0]

[0]

[0]

then it will go back to step A. 

Once Step D is reached it will output an L/True. 

 

Code I have: http://pastie.org/private/ufdfasgdjdvginc5cocqq

Output: (the very last L=0 should be L=1)

[79wjd]

anyone? 

 

/bump :unsure:

 

Nvm figured it out