Intel Xe graphics compounding

[Fasauceome]

In tech linked today, Riley explained that the number replacing the e in the Intel Xe is rumored to denote how many graphics processors are packaged on the card. Last year, I read that an Intel engineer had stated explicitly that "combining numerous Integrated graphics chips" would net some serious performance, comparable to discrete solutions. Just going on the fact that it was specified in that manner, I think this leak is actually accurate, and Intel, having experience with their Mesh and Ring bus communication strategies for their CPUs, has the technology and know how to make compute units work together in tandem pretty well.

 

The astronomical bandwidth rumored to be available is potentially amiss, some proposed 32TB/sec last I read, but otherwise foundationally it seems legit. Thoughts?

[Dabombinable]

27 minutes ago, fasauceome said:

In tech linked today, Riley explained that the number replacing the e in the Intel Xe is rumored to denote how many graphics processors are packaged on the card. Last year, I read that an Intel engineer had stated explicitly that "combining numerous Integrated graphics chips" would net some serious performance, comparable to discrete solutions. Just going on the fact that it was specified in that manner, I think this leak is actually accurate, and Intel, having experience with their Mesh and Ring bus communication strategies for their CPUs, has the technology and know how to make compute units work together in tandem pretty well.

 

The astronomical bandwidth rumored to be available is potentially amiss, some proposed 32TB/sec last I read, but otherwise foundationally it seems legit. Thoughts?

I see it as quite possible, after Intel's efforts with their Vega NUC. Considering that was a fully fledged GPU on the same substrate as the CPU, HBM and all.

[Fasauceome]

1 minute ago, Dabombinable said:

I see it as quite possible, after Intel's efforts with their Vega NUC. Considering that was a fully fledged GPU on the same substrate as the CPU, HBM and all.

Since that was a PCIe X8 connection I wonder if they'll continue to use PCIe internally or to create their own interface, like how NVLink is a separate and better connection type.