patrickjp93

I'm sorry but that's ridiculous. AMD is cherry picking components to compare. Anandtech will clear this up in short order after launch.

The paste isn't the problem either. Both Intel and AMD use Dow Corning between the die and IHS (see AMD APUs). The problem is the glue Intel uses is so viscous the spacing between die and IHS is inconsistent and can be too large. That's the single biggest contributing factor to the temperatures. Just removing the glue and applying Dow Corning reduces temps by 15-20 degrees. The extra 5 CLU gets you is great, but you have to reapply CLU every 12 months or so.

The substrate bends have all been found to be caused with abusive mounting force such as with a power drill. The reports stopped after the first few for exactly this reason. It's not an actual problem.

The only die we have is an 8-core, and the 6900K is a cut-down 10-core die. Seriously people, think... And even if this is a quad-core module, Intel has the iGPU included and AMD doesn't. Either way, huge density DISadvantage for AMD.

Considering they vastly outnumber GPUs and other accelerators in datacenters across the world, yes, they're typical. And mind you consumer software just doesn't make use of advanced CPUs. Hell games still really haven't discovered vectorization despite SSE being 11 years old now. We can get 10x CPU performance improvements from Sandy Bridge on just by changing some industry standard code into AVX intrinsics. You wouldn't even need multithreading at that point. 1 core on a 2600K using AVX can outperform the entire 6950X using scalar but multithreaded code. That should have the community up in arms against bad development studio practices, and yet... If consumer software truly necessitated those core counts, Intel would provide them cheaply, but such software really doesn't exist outside of the professional apps like the Adobe/Sony suites.

The very biggest chips in the world are CPUs. Knight's Landing is nearly 700mm sq.. The 8890 V3 is 662mm sq.. Back on 90nm the top Xeon was 710mm sq.. The biggest GPU die ever I believe was big Maxwell at just 610mm sq..

Until you get to industry where the old guard is too set in its ways...

GTFO, Dual Omnipath HD 4x for 1T connectivity.

This would be even faster, use the best networking, believe me. Also... XL!!! You can get 4TB SATA SSDs now, so half a Petabyte of high-speed storage is cache vs. the 1PB of SATA HDDs for big storage...

Instead of the Storinator, it'll be "THE CACHINATOR SPEED DEMON XL!!!" Also, he'll get the 4TB versions TYVM...

@LinusTech...

You just need an LSI card and 2 external enclosures You can run 128 drives off of a 2-port MegaRaid card.

Which makes them 20nm really, but that's still old planar tech, so no surprise there.

You said security updates specific to Skylake, which would require they be doing something directly to the CPU since security updates for the OS would be architecture-agnostic anyway.

We have 15nm DRAM, not NAND. NAND pukes on itself around 18nm last I heard.

... Security updates for the CPU...from Microsoft... Please go sit in a corner and think more carefully about that. The only way for a CPU to be updated is if Intel itself injects such an update into a bios update for motherboards. The OS cannot touch any of the caches necessary to overwrite anything in the CPU microcode controls.

No, but he is emaciated...

I'm pretty sure Samsung is currently making 32/28nm NAND, so the shrink isn't THAT much.

It's just as strong as an A8 from AMD. Hell in a number of compute benchmarks Skylake GT2 goes toe to toe with an A10. Compute power is compute power. Games should try to make use of everything in the system to its fullest extent, period. A real developer maximizes the performance potential of any system. That is my standard as an HPC programmer, and given my age that standard should be lower than industry veterans'. Sorry but still wrong. If I just want to practice parallel and heterogeneous computing but don't want to triple my electric bill by having a dGPU, an iGPU is a very good option. Also, really, how old are you? Twelve?

Java compared to C is easy. Compared to C++ it's like pulling teeth to do anything important. Once you learn how to leverage the STL and just 1 or 2 Boost libraries, you will NEVER want to go back to Java.

It's the glue causing high spacing between the die and IHS. Please actually read the facts behind the headlines instead of running your mouth. If you remove the glue and use the same TIM you also tend to wind up with a 15-20* reduction.

2017* You forget Coffee Lake in Q4.

It's not overpriced if it sells - Microeconomics 101. And Intel has been giving consumers what they want: performance. The problem with you is you think cores are everything. Nothing could be farther from the truth, especially where games are concerned, if only the industry would wake up to what's existed for 10 years... Intel has been the one driving performance innovation. The problem is the games market is a good 10 years behind or more when it comes to the instruction sets and performance available. I have a program on my blog here comparing industry code from UE 4 to a version coded to take advantage of AVX. 1 core to 1 core it's a 10x speedup, and that's just on my MacBook Pro that for all I know might be thermal throttling every few milliseconds to stay in TDP (the fan never spins up, but idk). You can't blame Intel for the choices of poorly trained programmers in an industry built to have high turnover and low (programmer) talent. There aren't enough performance engineers on the CPU side.

No it isn't. I for one would love if I could switch off all my dGPUs when I don't need them. Further, there's a lot of "CPU" performance being left on the table because the iGPU isn't being used b/c lazy devs. Even Sandy Bridge has another 4-5 years' worth of potential the moment games start making use of AVX. It's not useless Silicon. You (and a very lazy dev community) simply haven't found the use (or the will TO use it). It's fully programmable for OpenCL 2.1, OpenMP 4.5, the most recent versions of OpenACC, and is fully DX 12 AND 12.1 compliant at the highest feature levels. Also, you say never until that one day your graphics card(s) die(s) or the video out port dies or the cable dies or the monitor port dies and you need to diagnose which of these is the issue.

The last report we have is from Q3 2016, and Nvidia claims it made ground in Q4. In terms of real production cost, the CPU is more expensive, but because of cache, not because of the logic. More of the die is used for cache and memory transactions than actual logic.