MSi Z170a SLI Plus: Is m.2 usable with all PCIe lanes occupied?
The CPU's PCIe lanes go to the top PCIe x16 slot, and the middle PCIe x8 slot. The top slot will run at x8 if the middle x8 slot is in use.
The M.2 slot goes through the chipset, and will have shared bandwidth with your SATA, LAN, USB, audio, bottom PCIe x4 slot and the PCIe x1 slots.
As the M.2 slot is wired to the chipset, not the CPU, you cannot run it in x8,x4,x4.
There is no indication that if you use the bottom PCIe X4 slot, and the M.2 are in use that one will disable the other. However, the DMI connection from the CPU to the chipset only has PCIe x4 bandwidth. If it works and both are used, you will have a bottleneck, likewise if you also use the PCIe x1 slots. Similarly, using LAN, SATA etc, will have a small impact on the M.2 slot performance as they compete for the DMI bandwidth.
If the devices that you connect do not need to use the full PCIe bandwidth you will likely not notice it much though.
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