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Hey all,

I'm wondering if anyone knows if I could run 2way SLI in slot 1 & 3 on the EVGA Classified motherboard rather than 1 & 4. Asking this because a 2way SLI water cooled setup looks odd because of the large gap in between the cards when placed in 1 & 4.

Thanks

151-HE-E999-KR_XL_5.jpg

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https://linustechtips.com/topic/539475-question-about-gpu-placement-for-sli/
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https://www.evga.com/support/manuals/files/151-HE-E999_Part1_v2.pdf

Looking at this manual, I think you can, so long you don't have a 5820K.

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2 minutes ago, exercutor5 said:

https://www.evga.com/support/manuals/files/151-HE-E999_Part1_v2.pdf

Looking at this manual, I think you can, so long you don't have a 5820K.

Thanks for the link to the manual. I plan on getting the 5960X. So for the 40 lane CPU, it says slot 1 & 4 runs at x16 each but if I used slot 1 & 3 it would run at x16 and x8 respectively. Would it be a noticeable performance drop running dual 980Ti's in 1 & 3? 

Manual.png

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Just now, TrinityHigh said:

So for the 40 lane CPU, it says slot 1 & 4 runs at x16 each but if I used slot 1 & 3 it would run at x16 and x8 respectively. Would it be a noticeable performance drop running dual 980Ti's in 1 & 3?

I doubt that you will notice the difference.

Frost | 7700K @ 4.9GHz 1.36v, delidded | Asus DUAL GTX 1060 6GB OC | Corsair LPX 16GB DDR4 2800MHz | Samsung 960 EVO 250GB SSD + Toshiba 1TB HDD + Toshiba 2TB HDD + Samsung 860 EVO 1TB SSD for macOS | Asus PRIME Z270-A | Fractal Design Celsius S24 | Seasonic M12-II 620W PSU | Corsair 400C White | NZXT Hue+

Samsung Galaxy S8 | Stock

Ticwatch E (Black) | Ticwatch Brown Leather Strap

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13 minutes ago, TrinityHigh said:

Thanks for the link to the manual. I plan on getting the 5960X. So for the 40 lane CPU, it says slot 1 & 4 runs at x16 each but if I used slot 1 & 3 it would run at x16 and x8 respectively. Would it be a noticeable performance drop running dual 980Ti's in 1 & 3? 

Manual.png

just run int in slot 1 and 3 there will be literally no difference for modern gpus when running in 8x or 16x especially if its in a sli conifg and only one of them is in 8x.

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